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Low Power and High Driving Capability of Amorphous Silicon Gate Driver Circuit

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10.1109/JDT.2015.2454951

Abstract

In this paper, we propose a novel amorphous silicon gate driver (ASG) circuit with useful driving methods in saving power consumption and improving driving capability as well. Unlike other driving methods that are used to improve the driving capability also increases the power consumption strikingly. In this paper, an ASG circuit with novel driving method is proposed and realized in standard 5-mask hydrogenated amorphous-silicon thin-film transistors (a-Si:H TFTs) process. The circuit consisting of 13 a-Si: H TFTs is used in portable flat-panel displays (FPDs) for the high driving capability and low power characteristic. By comparing other driving methods, the results of the definitive measurement show that the minimum driving high voltage is improved with 2 volts increment and the power consumption increases 9.7% slightly. Moreover, the other dynamic characteristics of the ASG, such as the rise time and fall time of the outputs, can be improved at the same time. To validate the results, the designate circuit is fabricated with 5-mu m a-Si:H TFT process and the experimental results confirm the practicability of achieved design. Three different driving methods are adopted in the same ASG circuit to respond three individual output characteristics.

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