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dc.contributor.authorHsieh, E. R.en_US
dc.contributor.authorWang, Y. D.en_US
dc.contributor.authorChung, Steve S.en_US
dc.contributor.authorKe, J. C.en_US
dc.contributor.authorYang, C. W.en_US
dc.contributor.authorHsu, S.en_US
dc.date.accessioned2017-04-21T06:50:15Z-
dc.date.available2017-04-21T06:50:15Z-
dc.date.issued2016en_US
dc.identifier.isbn978-1-5090-0638-0en_US
dc.identifier.urihttp://hdl.handle.net/11536/134336-
dc.description.abstractThe interfacial dipole and bulk trap in HKMG stack have been found to be significant to the work function variation (sigma V-WF), in addition to the metal grains. In order to differentiate their effects on sigma V-WF, a new variation plot is proposed and the dipole and trap effects can be distinguished. Here, we propose a simple experimental method to separate the effects of MG/HK and HK/IL interfacial dipoles. In pMOSFET, HK/IL dipoles dominate HK induced variation; MG/HK dipoles are dominant in nMOSFET. However, in terms of the reliability test, after PBTI stress, HK bulk traps play a major role in the variation of nMOSFET, while after NBTI, HK/IL dipoles are strengthened by hydrogen bonds and still dominant in work function variation of pMOSFET. Design guideline is provided to deal with the passivation of high-k traps by nitrogen concentration and the improvement of variability in HKMG CMOS devices.en_US
dc.language.isoen_USen_US
dc.titleA New Variation Plot to Examine the Interfacial-dipole Induced Work-function Variation in Advanced High-k Metal-gate CMOS Devicesen_US
dc.typeProceedings Paperen_US
dc.identifier.journal2016 IEEE SYMPOSIUM ON VLSI TECHNOLOGYen_US
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.identifier.wosnumberWOS:000390702200079en_US
dc.citation.woscount0en_US
Appears in Collections:Conferences Paper