A 0.8V, 43.5 mu W ECG Signal Acquisition IC with a Referenceless Time-to-Digital Converter

Abstract

This paper presents a 0.8V analog front-end (AFE) with referenceless time-based digitalization architecture for electrocardiogram (ECG) signal acquisition. Compared to the conventional voltage-domain architecture, the proposed AFE achieves a smaller chip area, lower power consumption, and self-calibration without the high-accuracy clock as well as voltage reference. The chip is fabricated using 0.18 mu m CMOS technology and occupies a chip area of 0.84 mm(2). The design attains a variable gain from 35 dB to 47 dB within a bandwidth of 7 kHz and 10-bit time-to-digital conversion while consuming 43.5 mu W at a supply voltage of 0.8V.