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dc.contributor.authorKao, H. L.en_US
dc.contributor.authorChin, Alberten_US
dc.contributor.authorChang, K. C.en_US
dc.contributor.authorMcAlister, S. P.en_US
dc.date.accessioned2017-04-21T06:49:43Z-
dc.date.available2017-04-21T06:49:43Z-
dc.date.issued2007en_US
dc.identifier.isbn978-0-7803-9764-4en_US
dc.identifier.urihttp://dx.doi.org/10.1109/SMIC.2007.322807en_US
dc.identifier.urihttp://hdl.handle.net/11536/134461-
dc.description.abstractWe present an ultra-wideband 3.1-10.6 GHz low-noise amplifier which uses a two-stage current-reuse structure to reduce the power. Fabricated in a 0.18 mu m CMOS process, the IC prototype achieved a power gain of 9.3 dB, a noise figure (NF) of < 5.6 dB, an input match of < -8 dB over the band, while consuming only 9.4 mW.en_US
dc.language.isoen_USen_US
dc.subjectlow noise amplifieren_US
dc.subjectultra-widebanden_US
dc.subjectlow poweren_US
dc.subjectCMOSen_US
dc.titleA low-power current-reuse LNA for ultra-wideband wireless receivers from 3.1 to 10.6 GHzen_US
dc.typeProceedings Paperen_US
dc.identifier.doi10.1109/SMIC.2007.322807en_US
dc.identifier.journal2007 TOPICAL MEETING ON SILICON MONOLITHIC INTEGRATED CIRCUITS IN RF SYSTEMS, DIGEST OF PAPERSen_US
dc.citation.spage257en_US
dc.citation.epage+en_US
dc.contributor.department交大名義發表zh_TW
dc.contributor.departmentNational Chiao Tung Universityen_US
dc.identifier.wosnumberWOS:000245461300064en_US
dc.citation.woscount1en_US
Appears in Collections:Conferences Paper


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