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dc.contributor.authorTang, Huei-Shiuanen_US
dc.contributor.authorYang, Cheng-Yenen_US
dc.contributor.authorLiu, Chih Weien_US
dc.contributor.authorChien, Chia-Chengen_US
dc.date.accessioned2017-04-21T06:49:31Z-
dc.date.available2017-04-21T06:49:31Z-
dc.date.issued2016en_US
dc.identifier.isbn978-1-5090-1570-2en_US
dc.identifier.urihttp://hdl.handle.net/11536/134521-
dc.description.abstractThis paper presents a low-power and real-time noise reduction (NR) algorithm using 18-band 1/3-octave quasi-ANSI filter bank for binaural hearing aids. With aids of binaural cues and minima controlled recursive average (MCRA) approach, the proposed NR algorithm consists of a directional mask and an estimated mask. The directional mask exploits the interaural time difference (ITD) together with the interaural level difference (ILD) of two input sources to attenuate the lateral noise, while the estimated mask is used to further reduce the background noise and the coherence noise. Investigated by the circumstances with the -3 dB, 0 dB, and 3 dB, respectively, cocktail-party effect, the simulation results show that the proposed binaural NR algorithm gains an average of approximately 5.07 dB SNR improvement. Moreover, the speech intelligibility index (SII performance is superior, comparing that with the state-of-the-art NR algorithms for hearing aids. The proposed binaural NR algorithm has been implemented in TSMC 90 nm CMOS high-VT technology. The chip design is operated by 288 KHz and consumes approximately 121.6 mu W (@1 V). The chip design can be operated by 0.6 V for real-time processing 24 kHz audio. The simulated power consumption is approximately 64.52 W for binaural hearing aids.en_US
dc.language.isoen_USen_US
dc.subjectbituutral oise reductionen_US
dc.subjectquasi-ANSI filter banken_US
dc.subjectITDen_US
dc.subjectILDen_US
dc.subjectMCRAen_US
dc.titleBinaural-Cue-Based Noise Reduction Using Multirate Quasi-ANSI Filter Bank for Hearing Aidsen_US
dc.typeProceedings Paperen_US
dc.identifier.journal2016 IEEE ASIA PACIFIC CONFERENCE ON CIRCUITS AND SYSTEMS (APCCAS)en_US
dc.citation.spage21en_US
dc.citation.epage24en_US
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.identifier.wosnumberWOS:000392651200006en_US
dc.citation.woscount0en_US
Appears in Collections:Conferences Paper