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dc.contributor.authorKuo, Ming-Haoen_US
dc.contributor.authorLee, M. C.en_US
dc.contributor.authorTien, J. W.en_US
dc.contributor.authorLai, Wei-Tingen_US
dc.contributor.authorLi, Pei-Wenen_US
dc.date.accessioned2017-04-21T06:48:48Z-
dc.date.available2017-04-21T06:48:48Z-
dc.date.issued2016en_US
dc.identifier.isbn978-1-5090-0726-4en_US
dc.identifier.urihttp://hdl.handle.net/11536/134684-
dc.description.abstractGe-dot/SiO2/SiGe-channel photoMOSFETs are demonstrated on a Si-photonics platform. The photoMOSFET is fabricated in standard CMOS processes with a self-organized gate stack of Ge-dot/SiO2/SiGe-channel using thermal oxidation of SiGe nanopillars over Si3N4 layers on Si substrates. The Ge-dot photoMOSFET, with 3 mu m channel length and 70 mu m channel width, features responsivity of over 2000A/W and 100 A/W with 6pW and 0.2 mu W, respectively, under illumination at 850nm. The responsivity is further improved by reducing the dot size and increasing the spatial density and most importantly, is insensitive to the gate oxide thickness, which is a great benefit for reducing the input capacitance and thus, improving speed and power consumption.en_US
dc.language.isoen_USen_US
dc.titleOptimal design of Ge-dot photoMOSFETs for highly-integrated monolithic Si Photonicsen_US
dc.typeProceedings Paperen_US
dc.identifier.journal2016 IEEE SILICON NANOELECTRONICS WORKSHOP (SNW)en_US
dc.citation.spage212en_US
dc.citation.epage213en_US
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.identifier.wosnumberWOS:000391250500093en_US
dc.citation.woscount0en_US
Appears in Collections:Conferences Paper