完整後設資料紀錄
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.author | Su, Hong-Yan | en_US |
dc.contributor.author | Hsu, Chih-Hao | en_US |
dc.contributor.author | Li, Yih-Lang | en_US |
dc.date.accessioned | 2017-04-21T06:48:48Z | - |
dc.date.available | 2017-04-21T06:48:48Z | - |
dc.date.issued | 2015 | en_US |
dc.identifier.isbn | 978-3-9815-3704-8 | en_US |
dc.identifier.issn | 1530-1591 | en_US |
dc.identifier.uri | http://hdl.handle.net/11536/134693 | - |
dc.description.abstract | Sub-circuit recognition (SR) is a problem of recognizing sub-circuits within a given circuit and is a fundamental component in simulation, verification and testing of computer-aided design. The SR problem can be formulated as subgraph isomorphism problem. Performance of previous works is not scalable as the complexities of modern designs increase. In this paper we propose a novel Prufer-encoding based SR algorithm that performs scalable and high-performance sub-circuit matching. Several techniques including tree structure partition, tree cutting and circuit graph encoding are proposed herein to decompose the SR problem into several small sub-sequence matching problems. A pre-filtering strategy is applied before matching to remove the sub-circuits that are not likely to be matched. A fast branch and bound approach is developed to identify all the sub-circuits within the given circuit. Experimental results show that SubHunter can achieve better performance than SubGemini and detect all the sub-circuits as well. As the circuit size increases, we can also achieve near linear runtime growth that outperforms the exponential growth for SubGemini, showing the scalability of the proposed algorithm. | en_US |
dc.language.iso | en_US | en_US |
dc.subject | Sub-circuit recognition | en_US |
dc.subject | graph isomorphism | en_US |
dc.subject | Prufer encoding | en_US |
dc.title | SubHunter: A High-Performance and Scalable Sub-Circuit Recognition Method with Prufer-Encoding | en_US |
dc.type | Proceedings Paper | en_US |
dc.identifier.journal | 2015 DESIGN, AUTOMATION & TEST IN EUROPE CONFERENCE & EXHIBITION (DATE) | en_US |
dc.citation.spage | 1583 | en_US |
dc.citation.epage | 1586 | en_US |
dc.contributor.department | 資訊工程學系 | zh_TW |
dc.contributor.department | Department of Computer Science | en_US |
dc.identifier.wosnumber | WOS:000380393200296 | en_US |
dc.citation.woscount | 0 | en_US |
顯示於類別: | 會議論文 |