完整後設資料紀錄
DC 欄位語言
dc.contributor.authorSu, Tzu-Hsiangen_US
dc.contributor.authorWu, Wei-Shanen_US
dc.contributor.authorChou, Chen-Teen_US
dc.contributor.authorCheng, Yuan-Chunen_US
dc.contributor.authorTsai, Meng-Tingen_US
dc.contributor.authorChen, Tien-Fuen_US
dc.date.accessioned2017-04-21T06:48:45Z-
dc.date.available2017-04-21T06:48:45Z-
dc.date.issued2014en_US
dc.identifier.isbn979-10-92279-00-9en_US
dc.identifier.urihttp://hdl.handle.net/11536/134713-
dc.description.abstractFaced with the rapid divergence of hardware used on embedded devices, there is a need for a tool that can efficiently assist with hardware/software co-design and architecture verification. Speeding up those ESL phases greatly reduces the length of development periods. To address this issue, our work implements a novel multi-granularity tracer for Android\'s simulator to provide ESL hardware design performance analysis and verification. In addition, we propose a flexible ESL module interface for system hardware designers to explore new hardware components via simple modules. Our work also enables software developers to identify performance bottleneck and assess software performance of new hardware components. Our case studies and experimental results show that our multi-granularity Android tracer can strip away irrelevant information to shave time off the architecture development period.en_US
dc.language.isoen_USen_US
dc.subjectcomponenten_US
dc.subjectAndroiden_US
dc.subjectQEMUen_US
dc.subjectsystem behavioren_US
dc.subjectvirtual machineen_US
dc.subjectvertical tracingen_US
dc.titleAccelerating Full-System Simulation and App Analysis through Focused Multi-Granularity Profilingen_US
dc.typeProceedings Paperen_US
dc.identifier.journalPROCEEDINGS OF THE 2014 ELECTRONIC SYSTEM LEVEL SYNTHESIS CONFERENCE (ESLSYN)en_US
dc.contributor.department資訊工程學系zh_TW
dc.contributor.departmentDepartment of Computer Scienceen_US
dc.identifier.wosnumberWOS:000343562900001en_US
dc.citation.woscount0en_US
顯示於類別:會議論文