標題: Real-Time Instruction-Cycle-Based Dynamic Voltage Scaling (iDVS) Power Management for Low-Power Digital Signal Processor (DSP) with 53% Energy Savings
作者: Peng, Shen-Yu
Lee, Yu-Huei
Wu, Chun-Hsien
Huang, Tzu-Chi
Chen, Ke-Horng
Lin, Ying-Hsi
Lee, Chao-Cheng
Huang, Chen-Chih
Yeh, Ching-Yuan
Chen, Yu-Wen
Liang, Chao-Chiun
Ho, Chang-An
Yu, Tun-Hao
交大名義發表
National Chiao Tung University
關鍵字: Fast transient;dynamic voltage scaling buck converter;SoC;low power design
公開日期: 2012
摘要: this paper presents an instruction-cycle-based dynamic voltage scaling (iDVS) power management strategy for a low-power processor design. The iDVS technique is fully compatible with conventional DVS scheduler algorithms. Furthermore, an additional iDVS design flow embedded in the standard cell lib flow is proposed to implement the iDVS-based DSP. In addition, the fast-response bidirectional asynchronous wave-pipeline (BAWP) digital low-dropout (LDO) regulator is also presented to improve the iDVS performance. The iDVS-based DSP chip implemented in an HH-NEC 0.18 mu m standard CMOS process demonstrates 53% energy savings over that without the iDVS technique.
URI: http://hdl.handle.net/11536/134774
ISBN: 978-1-4673-2771-8
期刊: 2012 IEEE Asian Solid State Circuits Conference (A-SSCC)
起始頁: 377
結束頁: 380
顯示於類別:會議論文