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dc.contributor.authorKu, Wei-Chunen_US
dc.contributor.authorChen, Tien-Fuen_US
dc.date.accessioned2017-04-21T06:50:05Z-
dc.date.available2017-04-21T06:50:05Z-
dc.date.issued2011en_US
dc.identifier.isbn978-1-4244-8499-7en_US
dc.identifier.urihttp://hdl.handle.net/11536/134795-
dc.description.abstractmanycore architecture is the trend of system design. However, manycore simulators face the important issue than general multicore simulators is simulation speed. Several studies provide a FPGA simulation methodology to solve it, but they almost do it by providing a new internal design of core. And some of them don\'t care the correctness without interconnection simulation. This paper provides a PVCT module and NIP methodology to solve these two issues. According to our experiment, we could provide a 91.4 MIPS simulation performance averagely with Splash2 benchmark by three physical cores. The number of three is decided by capability of Xilinx XC2V8000 FPGA chip.en_US
dc.language.isoen_USen_US
dc.titleAccelerating Manycore Simulation by Efficient NoC Interconnection Partition on FPGA Simulation Platformen_US
dc.typeProceedings Paperen_US
dc.identifier.journal2011 INTERNATIONAL SYMPOSIUM ON VLSI DESIGN, AUTOMATION AND TEST (VLSI-DAT)en_US
dc.citation.spage316en_US
dc.citation.epage319en_US
dc.contributor.department交大名義發表zh_TW
dc.contributor.departmentNational Chiao Tung Universityen_US
dc.identifier.wosnumberWOS:000300488600069en_US
dc.citation.woscount0en_US
Appears in Collections:Conferences Paper