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dc.contributor.authorGhosh, Amlanen_US
dc.contributor.authorBrown, Richard B.en_US
dc.contributor.authorRao, Rahul M.en_US
dc.contributor.authorChuang, Ching-Teen_US
dc.date.accessioned2017-04-21T06:49:31Z-
dc.date.available2017-04-21T06:49:31Z-
dc.date.issued2009en_US
dc.identifier.isbn978-1-4244-3827-3en_US
dc.identifier.urihttp://dx.doi.org/10.1109/ISCAS.2009.5117765en_US
dc.identifier.urihttp://hdl.handle.net/11536/134986-
dc.description.abstractNegative Bias Temperature Instability (NBTI) has become an important cause of degradation in scaled PMOS devices, affecting power, performance, yield and reliability of circuits. This paper proposes a scheme to detect PMOS threshold voltage (V-TH) degradation using on-chip slew-rate monitor circuitry. The degradation in the PMOS threshold voltage is determined with high resolution by sensing the change in rise time in a stressed ring oscillator. Simulations in IBM\'s 65nm PD/SOI CMOS technology demonstrate good linearity and an output sensitivity of 0.25mV/mV using the proposed scheme.en_US
dc.language.isoen_USen_US
dc.titleA Precise Negative Bias Temperature Instability Sensor using Slew-Rate Monitor Circuitryen_US
dc.typeProceedings Paperen_US
dc.identifier.doi10.1109/ISCAS.2009.5117765en_US
dc.identifier.journalISCAS: 2009 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS 1-5en_US
dc.citation.spage381en_US
dc.citation.epage+en_US
dc.contributor.department交大名義發表zh_TW
dc.contributor.departmentNational Chiao Tung Universityen_US
dc.identifier.wosnumberWOS:000275929800096en_US
dc.citation.woscount5en_US
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