完整後設資料紀錄
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dc.contributor.authorFunamiz, K.en_US
dc.contributor.authorLin, Y. C.en_US
dc.contributor.authorKakushima, K.en_US
dc.contributor.authorAhmet, P.en_US
dc.contributor.authorTsutsui, K.en_US
dc.contributor.authorSugii, N.en_US
dc.contributor.authorChang, E. Y.en_US
dc.contributor.authorHattori, T.en_US
dc.contributor.authorIwai, H.en_US
dc.date.accessioned2017-04-21T06:49:32Z-
dc.date.available2017-04-21T06:49:32Z-
dc.date.issued2009en_US
dc.identifier.isbn978-1-60768-093-2en_US
dc.identifier.isbn978-1-56677-743-8en_US
dc.identifier.issn1938-5862en_US
dc.identifier.urihttp://dx.doi.org/10.1149/1.3206625en_US
dc.identifier.urihttp://hdl.handle.net/11536/135005-
dc.description.abstractInGaAs MOS capacitors with HfO2 and La2O3 gate dielectrics have been investigated. La2O3 capacitor was found to result in large leakage current. This can be attributed to the annealing-induced As diffusion into La2O3 layer from InGaAs substrate. This leakage current was found to be suppressed by inserting HfO2 layer between La2O3 layer and InGaAs.en_US
dc.language.isoen_USen_US
dc.titleElectrical Characteristics of HfO2 and La2O3 Gate Dielectrics for In0.53Ga0.47As MOS Structureen_US
dc.typeProceedings Paperen_US
dc.identifier.doi10.1149/1.3206625en_US
dc.identifier.journalPHYSICS AND TECHNOLOGY OF HIGH-K GATE DIELECTRICS 7en_US
dc.citation.volume25en_US
dc.citation.issue6en_US
dc.citation.spage265en_US
dc.citation.epage270en_US
dc.contributor.department交大名義發表zh_TW
dc.contributor.departmentNational Chiao Tung Universityen_US
dc.identifier.wosnumberWOS:000338086300024en_US
dc.citation.woscount3en_US
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