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dc.contributor.authorLiao, Chien-Weien_US
dc.contributor.authorLai, Sheng-Chihen_US
dc.contributor.authorLue, Hang-Tingen_US
dc.contributor.authorYang, Ming-Juien_US
dc.contributor.authorShen, Chin-Yenen_US
dc.contributor.authorLue, Yi-Hsienen_US
dc.contributor.authorHuang, Yu-Fongen_US
dc.contributor.authorHsieh, Jung-Yuen_US
dc.contributor.authorWang, Szu-Yuen_US
dc.contributor.authorLuo, Guang-Lien_US
dc.contributor.authorChien, Chao-Hsinen_US
dc.contributor.authorHsieh, Kuang-Yeuen_US
dc.contributor.authorLiu, Richen_US
dc.contributor.authorLu, Chih-Yuanen_US
dc.date.accessioned2017-04-21T06:49:32Z-
dc.date.available2017-04-21T06:49:32Z-
dc.date.issued2009en_US
dc.identifier.isbn978-1-4244-2784-0en_US
dc.identifier.urihttp://hdl.handle.net/11536/135009-
dc.description.abstractThe reliability of MANOS devices with an oxide buffer layer (MAONOS) in between SiN trapping layer and high-K Al2O3 top dielectric is extensively studied. We conclude that the primary function of high-K Al2O3 is to suppress the gate electron injection during erase instead of increasing the P/E speed. As a result, inserting a buffer oxide only changes EOT but does not change the P/E mechanisms. On the other hand, the buffer oxide can greatly improve data retention by suppressing leakage through Al2O3. However, owing to the slow erase performances with a thick bottom oxide, both MANOS and MAONOS erase slowly and very high erase voltages must be used. Also, both MANOS and MAONOS devices show very fast endurance degradation below P/E<10, which is inherent due to electron de-trapping mechanism. Moreover, the large erase voltage also causes severe degradation of tunnel oxide after many P/E cycling. To get both speed and reliability performances, it is necessary to introduce bandgap engineered tunneling barrier (BE-MANOS) to solve the fundamental problems of MANOS.en_US
dc.language.isoen_USen_US
dc.titleReliability Study of MANOS with and without a SiO2 Buffer Layer and BE-MANOS Charge-Trapping NAND Flash Devicesen_US
dc.typeProceedings Paperen_US
dc.identifier.journalPROCEEDINGS OF TECHNICAL PROGRAM: 2009 INTERNATIONAL SYMPOSIUM ON VLSI TECHNOLOGY, SYSTEMS AND APPLICATIONSen_US
dc.citation.spage152en_US
dc.citation.epage+en_US
dc.contributor.department電機學院zh_TW
dc.contributor.departmentCollege of Electrical and Computer Engineeringen_US
dc.identifier.wosnumberWOS:000272451000068en_US
dc.citation.woscount1en_US
Appears in Collections:Conferences Paper