A programmable dual hysteretic window comparator

doi:10.1109/ISCAS.2008.4541821

完整後設資料紀錄

DC 欄位	值	語言
dc.contributor.author	Huang, Hong-Wei	en_US
dc.contributor.author	Lin, Chia-Hsiang	en_US
dc.contributor.author	Chen, Ke-Horng	en_US
dc.date.accessioned	2017-04-21T06:48:51Z	-
dc.date.available	2017-04-21T06:48:51Z	-
dc.date.issued	2008	en_US
dc.identifier.isbn	978-1-4244-2078-0	en_US
dc.identifier.issn	0271-4302	en_US
dc.identifier.uri	http://dx.doi.org/10.1109/ISCAS.2008.4541821	en_US
dc.identifier.uri	http://hdl.handle.net/11536/135096	-
dc.description.abstract	A programmable dual hysteretic window comparator is presented in this paper. The comparator uses a cascoded flipped voltage follower (CASFVF), a high speed V-I converter, and a current comparator to enhance the response time and accuracy. Moreover, the positive and negative hysteretic thresholds can be programmable, respectively. Simulation results in 0.25-mu m CMOS technology demonstrate the validity of the designed approach.	en_US
dc.language.iso	en_US	en_US
dc.subject	hysteretic comparaor	en_US
dc.subject	V-I converter	en_US
dc.subject	flipped voltage follower	en_US
dc.title	A programmable dual hysteretic window comparator	en_US
dc.type	Proceedings Paper	en_US
dc.identifier.doi	10.1109/ISCAS.2008.4541821	en_US
dc.identifier.journal	PROCEEDINGS OF 2008 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS 1-10	en_US
dc.citation.spage	1930	en_US
dc.citation.epage	+	en_US
dc.contributor.department	電控工程研究所	zh_TW
dc.contributor.department	Institute of Electrical and Control Engineering	en_US
dc.identifier.wosnumber	WOS:000258532101214	en_US
dc.citation.woscount	4	en_US
顯示於類別：	會議論文