Full metadata record
DC Field | Value | Language |
---|---|---|
dc.contributor.author | Jian, Guo-An | en_US |
dc.contributor.author | Lee, Jui-Sheng | en_US |
dc.contributor.author | Tan, Kheng-Joo | en_US |
dc.contributor.author | Chen, Peng-Sheng | en_US |
dc.contributor.author | Guo, Jiun-In | en_US |
dc.date.accessioned | 2017-04-21T06:49:47Z | - |
dc.date.available | 2017-04-21T06:49:47Z | - |
dc.date.issued | 2013 | en_US |
dc.identifier.isbn | 978-1-4673-4436-4 | en_US |
dc.identifier.issn | 2474-2724 | en_US |
dc.identifier.uri | http://hdl.handle.net/11536/135421 | - |
dc.description.abstract | Scalable video coding (SVC) is a video coding technique that mainly aims its target in resolving problems of multimedia communication between servers and various clients with different computational power, transmission bandwidths, and display resolutions. In this paper, we developed a parallel SVC encoding system to achieve the real-time coding performance of SVC. First, a GOP-level bit-stream structure that is fully compatible with the standard SVC decoder was proposed to eliminate the data dependencies of encoding among GOPs. Based on this bit-stream structure, we developed a parallel SVC encoding algorithm to exploit the parallelism on multicore systems. Finally, the proposed parallel SVC encoder was implemented and integrated into a multimedia streaming system for the evaluation. The experimental results showed that for CIF/QCIF and VGA/QVGA 2-layer SVC encoding, the proposed parallel SVC encoder can achieve 50.96 and 103.99 times speedup with negligible PSNR drop, respectively. | en_US |
dc.language.iso | en_US | en_US |
dc.subject | Scalable Video Coding (SVC) | en_US |
dc.subject | parallel programming | en_US |
dc.subject | streaming system | en_US |
dc.subject | real-time encoder | en_US |
dc.title | A REAL-TIME PARALLEL SCALABLE VIDEO ENCODER FOR MULTIMEDIA STREAMING SYSTEMS | en_US |
dc.type | Proceedings Paper | en_US |
dc.identifier.journal | 2013 INTERNATIONAL SYMPOSIUM ON VLSI DESIGN, AUTOMATION, AND TEST (VLSI-DAT) | en_US |
dc.contributor.department | 電子工程學系及電子研究所 | zh_TW |
dc.contributor.department | Department of Electronics Engineering and Institute of Electronics | en_US |
dc.identifier.wosnumber | WOS:000393052900048 | en_US |
dc.citation.woscount | 0 | en_US |
Appears in Collections: | Conferences Paper |