完整後設資料紀錄
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.author | Lin, Chi-Shiung | en_US |
dc.contributor.author | Lin, Yu-Chun | en_US |
dc.contributor.author | Jou, Shyh-Jye | en_US |
dc.contributor.author | Shiou, Mun-Tian | en_US |
dc.date.accessioned | 2017-04-21T06:49:05Z | - |
dc.date.available | 2017-04-21T06:49:05Z | - |
dc.date.issued | 2007 | en_US |
dc.identifier.isbn | 978-1-4244-0786-6 | en_US |
dc.identifier.uri | http://hdl.handle.net/11536/135672 | - |
dc.description.abstract | An all digital 3.5Gbps blind Adaptive Decision Feedback Equalizer (ADFE) is designed for 10GBase-LX4 IEEE 802.3ae standard. It uses 5 parallel equalization blocks each with 6 taps and 4 taps for each Feed-Forward Equalizer (FFE) and Feed-Back Equalizer (FBE). This concurrent ADFE has core area of 0.864 x 0.864 mm(2) with operation up to 3.5 Gbps using 1.2-V supply in a 0.13 um CMOS process. It dissipates 94 mW when working at 3.125 Gbps. | en_US |
dc.language.iso | en_US | en_US |
dc.title | Concurrent digital Adaptive Decision Feedback Equalizer for 10GBase-LX4 Ethernet system | en_US |
dc.type | Proceedings Paper | en_US |
dc.identifier.journal | PROCEEDINGS OF THE IEEE 2007 CUSTOM INTEGRATED CIRCUITS CONFERENCE | en_US |
dc.citation.spage | 289 | en_US |
dc.citation.epage | + | en_US |
dc.contributor.department | 電機工程學系 | zh_TW |
dc.contributor.department | Department of Electrical and Computer Engineering | en_US |
dc.identifier.wosnumber | WOS:000252233200066 | en_US |
dc.citation.woscount | 2 | en_US |
顯示於類別: | 會議論文 |