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dc.contributor.authorLin, Jia-Nien_US
dc.contributor.authorChu, Hsing-Chienen_US
dc.contributor.authorChen, Zong-Yien_US
dc.contributor.authorHung, Chung-Chihen_US
dc.date.accessioned2017-04-21T06:49:30Z-
dc.date.available2017-04-21T06:49:30Z-
dc.date.issued2015en_US
dc.identifier.isbn978-1-4799-8364-3en_US
dc.identifier.urihttp://hdl.handle.net/11536/135767-
dc.description.abstractA 4-bit continuous-time delta-sigma modulator (CT-DSM) with the proposed data-weighted averaging (DWA) algorithm for audio application is presented. The proposed method randomly adds one to pointer address in the DWA to reduce distortion tones and improve the performance of spurious-free dynamic range (SFDR) and signal to noise and distortion ratio (SNDR), as compared with the conventional DWA. The post-layout simulation results show that the modulator designed in TSMC 0.18 mu m CMOS process achieves the SNDR of 81.5 dB and the dynamic range (DR) of 85dB in 24 kHz signal bandwidth. The chip area is 1.168 x 0.632 mm(2) and the power consumption is 339 mu W from a 1.8 V power supply.en_US
dc.language.isoen_USen_US
dc.subjectDelta-sigma Modulator (DSM)en_US
dc.subjectcontinuous-time (CT)en_US
dc.subjectdata-weighted averaging (DWA)en_US
dc.titleA Continuous-Time Delta-Sigma Modulator with Novel Data-Weighted Averaging Algorithm for Audio Applicationen_US
dc.typeProceedings Paperen_US
dc.identifier.journalPROCEEDINGS OF THE 2015 IEEE INTERNATIONAL CONFERENCE ON ELECTRON DEVICES AND SOLID-STATE CIRCUITS (EDSSC)en_US
dc.citation.spage281en_US
dc.citation.epage284en_US
dc.contributor.department電機學院zh_TW
dc.contributor.departmentCollege of Electrical and Computer Engineeringen_US
dc.identifier.wosnumberWOS:000380458700071en_US
dc.citation.woscount0en_US
Appears in Collections:Conferences Paper