完整後設資料紀錄
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.author | Lin, Jia-Ni | en_US |
dc.contributor.author | Chu, Hsing-Chien | en_US |
dc.contributor.author | Chen, Zong-Yi | en_US |
dc.contributor.author | Hung, Chung-Chih | en_US |
dc.date.accessioned | 2017-04-21T06:49:30Z | - |
dc.date.available | 2017-04-21T06:49:30Z | - |
dc.date.issued | 2015 | en_US |
dc.identifier.isbn | 978-1-4799-8364-3 | en_US |
dc.identifier.uri | http://hdl.handle.net/11536/135767 | - |
dc.description.abstract | A 4-bit continuous-time delta-sigma modulator (CT-DSM) with the proposed data-weighted averaging (DWA) algorithm for audio application is presented. The proposed method randomly adds one to pointer address in the DWA to reduce distortion tones and improve the performance of spurious-free dynamic range (SFDR) and signal to noise and distortion ratio (SNDR), as compared with the conventional DWA. The post-layout simulation results show that the modulator designed in TSMC 0.18 mu m CMOS process achieves the SNDR of 81.5 dB and the dynamic range (DR) of 85dB in 24 kHz signal bandwidth. The chip area is 1.168 x 0.632 mm(2) and the power consumption is 339 mu W from a 1.8 V power supply. | en_US |
dc.language.iso | en_US | en_US |
dc.subject | Delta-sigma Modulator (DSM) | en_US |
dc.subject | continuous-time (CT) | en_US |
dc.subject | data-weighted averaging (DWA) | en_US |
dc.title | A Continuous-Time Delta-Sigma Modulator with Novel Data-Weighted Averaging Algorithm for Audio Application | en_US |
dc.type | Proceedings Paper | en_US |
dc.identifier.journal | PROCEEDINGS OF THE 2015 IEEE INTERNATIONAL CONFERENCE ON ELECTRON DEVICES AND SOLID-STATE CIRCUITS (EDSSC) | en_US |
dc.citation.spage | 281 | en_US |
dc.citation.epage | 284 | en_US |
dc.contributor.department | 電機學院 | zh_TW |
dc.contributor.department | College of Electrical and Computer Engineering | en_US |
dc.identifier.wosnumber | WOS:000380458700071 | en_US |
dc.citation.woscount | 0 | en_US |
顯示於類別: | 會議論文 |