Title: A Reliable Brain Computer Interface Implemented On FPGA For Mobile Dialing System
Authors: Feng, Chih-Wei
Chang, Jui-Chung
Chen, Wei-Chen
Fang, Wai-Chi
電子工程學系及電子研究所
Department of Electronics Engineering and Institute of Electronics
Issue Date: 2015
Abstract: This paper demonstrates a high performance brain-computer interface (BCI) that allows users to dial phone numbers. The system is based on Canonical Correlation Analysis (CCA) and Steady-State Visual Evoked Potential (SSVEP). Through six buttons (9Hz, 10Hz, 11Hz, 12Hz, 13 Hz, 14Hz) displayed on the screen, subjects can choose the number by gazing at the computer interface. This proposed EEG (Electroencephalography) system has been implemented in Field-Programmable Gate Arrays (FPGA) and it features high accuracy, integration density, and low cost. These features are meaningful for implementing a real time SSVEP-based BCI.
URI: http://hdl.handle.net/11536/135808
ISBN: 978-1-4799-8745-0
Journal: 2015 IEEE INTERNATIONAL CONFERENCE ON CONSUMER ELECTRONICS - TAIWAN (ICCE-TW)
Begin Page: 110
End Page: 111
Appears in Collections:Conferences Paper