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dc.contributor.authorLuc, Quang-Hoen_US
dc.contributor.authorChang, Po-Chunen_US
dc.contributor.authorDo, Huy-Binhen_US
dc.contributor.authorLin, Yueh-Chinen_US
dc.contributor.authorChang, Edward Yien_US
dc.date.accessioned2017-04-21T06:48:56Z-
dc.date.available2017-04-21T06:48:56Z-
dc.date.issued2016en_US
dc.identifier.isbn978-1-4673-8805-4en_US
dc.identifier.urihttp://hdl.handle.net/11536/135895-
dc.description.abstractIn situ PEALD processes, including PEALD-A1N pre-gate and post-gate plasma gas treatments, have been studied as a promising passivation method to realize the high interfacial quality of high-k/III-V structures. The formation of excellent dielectric gate stack has been obtained on the HfO2/n, p-In0.53Ga0.47As MOSCAPs by inserting an A1N interfacial layer. The improvements on the electrical properties of HfO2/In0.53Ga0.47As nMOSFET such as maximum drain current, subthreshold swing, off leakage current, and effective electron mobility have been achieved. Utilizing low frequency noise, charge pumping, and bias temperature instability stress technologies, the reliability of the in situ PEALD-passivated HfO2/In0.53Ga0.47As nMOSFET is evaluated.en_US
dc.language.isoen_USen_US
dc.titleSTUDY ON THE ELECTRICAL CHARACTERISTICS OF IN SITU PEALD-PASSIVATED HFO2/IN(0.53)GA(0.47)AS MOSCAP AND MOSFET STRUCTURESen_US
dc.typeProceedings Paperen_US
dc.identifier.journal2016 CHINA SEMICONDUCTOR TECHNOLOGY INTERNATIONAL CONFERENCE (CSTIC)en_US
dc.contributor.department材料科學與工程學系zh_TW
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.departmentDepartment of Materials Science and Engineeringen_US
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.identifier.wosnumberWOS:000381743000194en_US
dc.citation.woscount0en_US
Appears in Collections:Conferences Paper