完整後設資料紀錄
DC 欄位語言
dc.contributor.authorWu, Kun-Longen_US
dc.contributor.authorLai, Kuan-Tingen_US
dc.contributor.authorHu, Roberten_US
dc.contributor.authorChang, Chi-Yangen_US
dc.date.accessioned2017-04-21T06:49:02Z-
dc.date.available2017-04-21T06:49:02Z-
dc.date.issued2015en_US
dc.identifier.isbn978-1-4799-8767-2en_US
dc.identifier.urihttp://hdl.handle.net/11536/135920-
dc.description.abstractThis manuscript explores the output phase imbalance observed in the common-gate common-source transistors, and gives a mathematical formulation in determining the length of the compensation transmission line. To demonstrate the validity of this wideband phase-compensation technique, a DC-50GHz active balun is designed using commercial 90nm-CMOS process and then measured, where the phase imbalance is less than 5 degrees while the magnitude imbalance is within 1dB. All ports are well-matched and positive gain has been sustained up to 50GHz; the output-referred 1dB compression point is around 3dBm. With 3V and 32.5mA drain bias, the total power consumption is 97.5mW. To our knowledge, this is the widest active balun ever designed with such tight output phase requirement.en_US
dc.language.isoen_USen_US
dc.subjectWidebanden_US
dc.subjectphase compensationen_US
dc.subjectactive balunen_US
dc.subjectdistributed amplifieren_US
dc.subjectCMOSen_US
dc.titleDC-50GHz Wideband Phase-Compensated 90nm-CMOS Active Balun Designen_US
dc.typeProceedings Paperen_US
dc.identifier.journal2015 ASIA-PACIFIC MICROWAVE CONFERENCE (APMC), VOLS 1-3en_US
dc.contributor.department電機學院zh_TW
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.departmentCollege of Electrical and Computer Engineeringen_US
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.identifier.wosnumberWOS:000382378800582en_US
dc.citation.woscount0en_US
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