完整後設資料紀錄
DC 欄位語言
dc.contributor.authorKu, Chih-Youen_US
dc.contributor.authorYeh, Kuo-Lingen_US
dc.contributor.authorGuo, Jyh-Chyurnen_US
dc.date.accessioned2017-04-21T06:49:16Z-
dc.date.available2017-04-21T06:49:16Z-
dc.date.issued2013en_US
dc.identifier.isbn978-1-4673-2141-9en_US
dc.identifier.isbn978-1-4673-6177-4en_US
dc.identifier.issn0149-645Xen_US
dc.identifier.urihttp://hdl.handle.net/11536/136029-
dc.description.abstractThe impact of STI stress on mobility and resulted transconductance (g(m)) degradation appear as a penalty of multi-finger devices for RF and analog design. Donut device layout is proposed to eliminate the STI transverse stress and achieve higher g(m). Both NMOS and PMOS can benefit from the donut layout, with higher cut-off frequency (f(T)). However, the layout dependence of g(m) and gate resistance (R-g) becomes a critical trade-off in determining high frequency performance other than f(T), such as maximum oscillation frequency (f(max)) and RF noise. In this paper, a comparison between multi-finger and donut MOSFETs in terms of f(T), f(max), and NFmin can provide a useful guideline of device layout for RF design using nanoscale CMOS technology.en_US
dc.language.isoen_USen_US
dc.subjectNanoscale CMOSen_US
dc.subjectlayouten_US
dc.subjectstressen_US
dc.subjectmulti-Fingeren_US
dc.subjectdonuten_US
dc.subjecthigh frequencyen_US
dc.subjectnoiseen_US
dc.subjectf(T)en_US
dc.subjectf(max)en_US
dc.subjectNFminen_US
dc.titleThe Impact of Layout Dependent Stress and Gate Resistance on High Frequency Performance and Noise in Multifinger and Donut MOSFETsen_US
dc.typeProceedings Paperen_US
dc.identifier.journal2013 IEEE MTT-S INTERNATIONAL MICROWAVE SYMPOSIUM DIGEST (IMS)en_US
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.identifier.wosnumberWOS:000369754300188en_US
dc.citation.woscount0en_US
顯示於類別:會議論文