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dc.contributor.authorHuang, Liang-Yuen_US
dc.contributor.authorWu, Chia-Yien_US
dc.contributor.authorLiu, Chun-Yien_US
dc.contributor.authorLiu, Wei-Changen_US
dc.contributor.authorWu, Chih-Fengen_US
dc.contributor.authorJou, Shyh-Jyeen_US
dc.date.accessioned2017-04-21T06:48:27Z-
dc.date.available2017-04-21T06:48:27Z-
dc.date.issued2015en_US
dc.identifier.isbn978-1-4799-6275-4en_US
dc.identifier.urihttp://hdl.handle.net/11536/136072-
dc.description.abstractIn this paper, a phase noise cancellation (PNC) architecture is presented for 60 GHz communication systems. The BER performance is severely degraded by the non-ideal carrier frequency in 60 GHz bandwidth, which causes both common phase error (CPE) and residual carrier frequency offset (RCFO). The proposed simplified two-stage CPE algorithm solves the RCFO and common phase nose in the frequency domain and eliminates the constellation rotation on each sub-channel. Two-stage architecture together with deep pipelining technique achieves a high throughput rate. This PNC architecture has been implemented in a SC/OFDM Dual-Mode baseband receiver satisfying the requirements of the 802.15.3c/802.11ad standard with a 40 nm process. The proposed PNC is able to support 64QAM/16QAM for OFDM/SC mode, and can achieve up to 19.2 Giga-hit per second (Gbps) throughput rate at 400 MHz operating frequency with power consumption of 33 mW and area of 0.142 mm(2).en_US
dc.language.isoen_USen_US
dc.titleA 802.15.3c/802.11ad Dual Mode Phase Noise Cancellation for 60 GHz Communication Systemsen_US
dc.typeProceedings Paperen_US
dc.identifier.journal2015 International symposium on VLSI Design, Automation and Test (VLSI-DAT)en_US
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.identifier.wosnumberWOS:000380584400082en_US
dc.citation.woscount0en_US
Appears in Collections:Conferences Paper