A Low Operating Voltage IGZO TFT Using LaLuO3 Gate Dielectric

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DC 欄位	值	語言
dc.contributor.author	Chou, Kun-I	en_US
dc.contributor.author	Hsu, Hsiao-Hsuan	en_US
dc.contributor.author	Cheng, Chun-Hu	en_US
dc.contributor.author	Lee, Kai-Yu	en_US
dc.contributor.author	Li, Shang-Rong	en_US
dc.contributor.author	Chin, Albert	en_US
dc.date.accessioned	2017-04-21T06:50:01Z	-
dc.date.available	2017-04-21T06:50:01Z	-
dc.date.issued	2013	en_US
dc.identifier.isbn	978-1-4673-2523-3	en_US
dc.identifier.uri	http://hdl.handle.net/11536/136156	-
dc.description.abstract	This study proposes a low operation voltage indium-gallium-zinc oxide (IGZO) thin-film transistor using a high-kappa lanthanum-lutetium oxide as the gate dielectric. It is the first time to integrate the high-kappa LaLuO3 into an IGZO TFT. The resulting LaLuO3/IGZO TFT shows a low threshold voltage of 0.32 V, a small sub-threshold swing of 310 mV/decade and an acceptable mobility (mu(FE)) of 6.6 cm(2)/V-s. The low V-T and small SS allow device operation voltage below 2.5 V.	en_US
dc.language.iso	en_US	en_US
dc.subject	thin film transistor (TFT)	en_US
dc.subject	InGaZnO	en_US
dc.subject	LaLuO3	en_US
dc.title	A Low Operating Voltage IGZO TFT Using LaLuO3 Gate Dielectric	en_US
dc.type	Proceedings Paper	en_US
dc.identifier.journal	2013 IEEE INTERNATIONAL CONFERENCE OF ELECTRON DEVICES AND SOLID-STATE CIRCUITS (EDSSC)	en_US
dc.contributor.department	電子工程學系及電子研究所	zh_TW
dc.contributor.department	Department of Electronics Engineering and Institute of Electronics	en_US
dc.identifier.wosnumber	WOS:000380585600188	en_US
dc.citation.woscount	0	en_US
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