Investigation and Benchmark of Intrinsic Drain-Induced-Barrier-Lowering (DIBL) for Ultra-Thin-Body III-V-on-Insulator n-MOSFETs

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DC 欄位	值	語言
dc.contributor.author	Yu, Chang-Hung	en_US
dc.contributor.author	Su, Pin	en_US
dc.date.accessioned	2017-04-21T06:49:30Z	-
dc.date.available	2017-04-21T06:49:30Z	-
dc.date.issued	2015	en_US
dc.identifier.isbn	978-1-4673-8155-0	en_US
dc.identifier.uri	http://hdl.handle.net/11536/136214	-
dc.description.abstract	The intrinsic drain-induced-barrier-lowering (DIBL) characteristics of ultra-thin-body (UTB) MOSFETs with various III-V channel materials (such as GaAs, In0.53Ga0.47As, In0.7Ga0.3As, InAs, In0.2Ga0.8Sb, InSb, etc.) has been investigated and benchmarked with the Si device. Our results indicate that the DIBL of the III-V-on-insulator devices can be worse than what permittivity predicts. The underlying mechanism is proposed. We also show that, with the aid of quantum confinement (along the channel-thickness direction), the DIBL of the III-V devices can be comparable to the Si device.	en_US
dc.language.iso	en_US	en_US
dc.subject	ultra-thin-body (UTB) structure	en_US
dc.subject	III-V	en_US
dc.subject	drain-induced-barrier-lowering (DIBL)	en_US
dc.subject	quantum confinement	en_US
dc.title	Investigation and Benchmark of Intrinsic Drain-Induced-Barrier-Lowering (DIBL) for Ultra-Thin-Body III-V-on-Insulator n-MOSFETs	en_US
dc.type	Proceedings Paper	en_US
dc.identifier.journal	2015 IEEE 15TH INTERNATIONAL CONFERENCE ON NANOTECHNOLOGY (IEEE-NANO)	en_US
dc.citation.spage	666	en_US
dc.citation.epage	669	en_US
dc.contributor.department	電子工程學系及電子研究所	zh_TW
dc.contributor.department	Department of Electronics Engineering and Institute of Electronics	en_US
dc.identifier.wosnumber	WOS:000380515200073	en_US
dc.citation.woscount	0	en_US
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