The Nitrogen Incorporated ZrO2 Charge Trapping Layers in Nonvolatile Memory Applications

完整後設資料紀錄

DC 欄位	值	語言
dc.contributor.author	Lin, Chih Ju	en_US
dc.contributor.author	Lee, Ming Ling	en_US
dc.contributor.author	Chang, Kow Ming	en_US
dc.contributor.author	Chang, Shan Wei	en_US
dc.contributor.author	Chen, Hsiang	en_US
dc.contributor.author	Kao, Chyuan Haur	en_US
dc.contributor.author	Sung, Wei Kung	en_US
dc.contributor.author	Kuo, Min Hau	en_US
dc.contributor.author	Chang, Che Wei	en_US
dc.contributor.author	Chang, Chia Lun	en_US
dc.contributor.author	Lin, Chun Fu	en_US
dc.date.accessioned	2017-04-21T06:49:28Z	-
dc.date.available	2017-04-21T06:49:28Z	-
dc.date.issued	2014	en_US
dc.identifier.isbn	978-1-4799-3282-5	en_US
dc.identifier.uri	http://hdl.handle.net/11536/136233	-
dc.description.abstract	In the study, the MOHOS-type memory using ZrO2 trapping layer with nitrogen incorporation and combined with rapid thermal annealing has been investigated. It can be found that the memory device by nitrogen incorporation annealed at 900 degrees C can improve memory device performance, including larger C-V hysteresis, faster P/E speed, better data retention, and. smaller charge loss about 7.7%.	en_US
dc.language.iso	en_US	en_US
dc.title	The Nitrogen Incorporated ZrO2 Charge Trapping Layers in Nonvolatile Memory Applications	en_US
dc.type	Proceedings Paper	en_US
dc.identifier.journal	2014 12TH IEEE INTERNATIONAL CONFERENCE ON SOLID-STATE AND INTEGRATED CIRCUIT TECHNOLOGY (ICSICT)	en_US
dc.contributor.department	電子工程學系及電子研究所	zh_TW
dc.contributor.department	Department of Electronics Engineering and Institute of Electronics	en_US
dc.identifier.wosnumber	WOS:000380478500465	en_US
dc.citation.woscount	0	en_US
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