標題: | Predicting V-t Mean and Variance from Parallel I-d Measurement with Model-Fitting Technique |
作者: | Tsai, Chih-Ying Lee, Kao-Chi Lin, Chien-Hsueh Yu, Sung-Chu Liau, Wen-Rong Hou, Alex Chun-Liang Chen, Ying-Yen Kuo, Chun-Yi Lee, Jih-Nung Chao, Mango C. -T. 電子工程學系及電子研究所 Department of Electronics Engineering and Institute of Electronics |
公開日期: | 2016 |
摘要: | To measure the variation of device V-t requires long test for conventional WAT test structures. This paper presents a framework that can efficiently and effectively obtain the mean and variance of V-t for a large number of DUTs. The proposed framework applies the model-based random forest as its core model-fitting technique to learn a model that can predict the mean and variance of V-t based on only the combined I-d measured from parallel connected DUTs. The experimental results based on the SPICE simulation of a UMC 28nm technology demonstrate that the proposed model-fitting framework can achieve a more than 99% R-squared for predicting both of V-t mean and variance. Compared to conventional WAT test structures using binary search, our proposed framework can achieve 42.9X speedup in turn of the required iterations of I-d measurement per DUT. |
URI: | http://hdl.handle.net/11536/136267 |
ISBN: | 978-1-4673-8454-4 |
ISSN: | 1093-0167 |
期刊: | 2016 IEEE 34TH VLSI TEST SYMPOSIUM (VTS) |
顯示於類別: | 會議論文 |