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dc.contributor.authorChen, Min-Chengen_US
dc.contributor.authorLin, Chia-Yien_US
dc.contributor.authorLi, Kai-Hsinen_US
dc.contributor.authorLi, Lain-Jongen_US
dc.contributor.authorChen, Chang-Hsiaoen_US
dc.contributor.authorChuang, Cheng-Haoen_US
dc.contributor.authorLee, Ming-Daoen_US
dc.contributor.authorChen, Yi-Juen_US
dc.contributor.authorHou, Yun-Fangen_US
dc.contributor.authorLin, Chang-Hsienen_US
dc.contributor.authorChen, Chun-Chien_US
dc.contributor.authorWu, Bo-Weien_US
dc.contributor.authorWu, Cheng-Sanen_US
dc.contributor.authorYang, Ivyen_US
dc.contributor.authorLee, Yao-Jenen_US
dc.contributor.authorYeh, Wen-Kuanen_US
dc.contributor.authorWang, Tahuien_US
dc.contributor.authorYang, Fu-Liangen_US
dc.contributor.authorHu, Chenmingen_US
dc.date.accessioned2017-04-21T06:49:14Z-
dc.date.available2017-04-21T06:49:14Z-
dc.date.issued2014en_US
dc.identifier.isbn978-1-4799-8000-0en_US
dc.identifier.urihttp://hdl.handle.net/11536/136340-
dc.description.abstractStackable 3DFETs such as FinFET using hybrid Si/MoS 2 channels were developed using a fully CMOS-compatible process. Adding several molecular layers (3-16 layers) of the transition-metal dichalcogenide (TMD), MoS2 to Si fin and nanowire resulted in improved (+25%) I-on,I-n of the FinFET and nanowire FET (NWFET). The PFETs also operated effectively and the N/P device V-th are low and matched perfectly. The proposed heterogeneous Si/TMD 3DFETs can be useful in future electronics.en_US
dc.language.isoen_USen_US
dc.titleHybrid Si/TMD 2D Electronic Double Channels Fabricated Using Solid CVD Few-Layer-MoS2 Stacking for V-th Matching and CMOS-Compatible 3DFETsen_US
dc.typeProceedings Paperen_US
dc.identifier.journal2014 IEEE INTERNATIONAL ELECTRON DEVICES MEETING (IEDM)en_US
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.identifier.wosnumberWOS:000370384800201en_US
dc.citation.woscount0en_US
Appears in Collections:Conferences Paper