標題: 3D Synaptic Architecture with Ultralow sub-10 fJ Energy per Spike for Neuromorphic Computation
作者: Wang, I-Ting
Lin, Yen-Chuan
Wang, Yu -Fen
Hsu, Chung-Wei
Hou, Tuo-Hung
電子工程學系及電子研究所
Department of Electronics Engineering and Institute of Electronics
公開日期: 2014
摘要: A high-density 3D synaptic architecture based on self-rectifying Ta/TaOx/TiO2/Ti RRAM is proposed as an energy- and cost-efficient neuromorphic computation hardware. The device shows excellent analog synaptic features that can be accurately described by the physical and compact models. Ultra-low energy consumption comparable to that of a biological synapse (<10 fJ/spike) has been demonstrated for the first time.
URI: http://hdl.handle.net/11536/136406
ISBN: 978-1-4799-8000-0
期刊: 2014 IEEE INTERNATIONAL ELECTRON DEVICES MEETING (IEDM)
顯示於類別:會議論文