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dc.contributor.authorHsieh, E. R.en_US
dc.contributor.authorChuang, C. H.en_US
dc.contributor.authorChung, Steve S.en_US
dc.date.accessioned2017-04-21T06:49:09Z-
dc.date.available2017-04-21T06:49:09Z-
dc.date.issued2016en_US
dc.identifier.isbn978-1-4673-9478-9en_US
dc.identifier.issn1930-8868en_US
dc.identifier.urihttp://hdl.handle.net/11536/136424-
dc.description.abstractFor the first time, a new 1T1R of volatile memory based on the interfacial dipole flipping mechanism, named as Dipole Dynamic Random Access Memory (DiRAM), has been reported. It features 4ns per bit of dipole switching time, larger than 109 of endurance, and 10 seconds of retention with reasonable positive and negative resistance window, low operation voltages with bit line at 0.8V and word line at 0.2V, and around 1 nano-Watt per bit of operation power. DiRAM is also easy to be integrated with state-of-the-art CMOS technology. The results have shown that this volatile memory may be a potential candidate for the next generation DRAM technology.en_US
dc.language.isoen_USen_US
dc.titleAn Innovative 1T1R Dipole Dynamic Random Access Memory (DiRAM) featuring High Speed, Ultra-low power, and Low Voltage Operationen_US
dc.typeProceedings Paperen_US
dc.identifier.journal2016 INTERNATIONAL SYMPOSIUM ON VLSI TECHNOLOGY, SYSTEMS AND APPLICATION (VLSI-TSA)en_US
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.identifier.wosnumberWOS:000389022000017en_US
dc.citation.woscount0en_US
Appears in Collections:Conferences Paper