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dc.contributor.authorLyu, Rong-Jheen_US
dc.contributor.authorChiu, Yun-Hsuanen_US
dc.contributor.authorLin, Horng-Chihen_US
dc.contributor.authorLi, Pei-Wenen_US
dc.contributor.authorHuang, Tiao-Yuanen_US
dc.date.accessioned2017-04-21T06:49:25Z-
dc.date.available2017-04-21T06:49:25Z-
dc.date.issued2016en_US
dc.identifier.isbn978-1-4673-9478-9en_US
dc.identifier.issn1930-8868en_US
dc.identifier.urihttp://hdl.handle.net/11536/136433-
dc.description.abstractWe demonstrate InGaZnO (IGZO) TFTs with channel-length (L) tunable V-th for high-gain BEOL logic gate inverters in a unique filmprofile engineering (FPE) approach. In this FPE scheme the thickness and film profile of gate oxide and IGZO active layer are directly tailored by L (0.4 - 0.8 mu m) in a single step, leading to a wide-ranging tunability in V-th of -0.2 -+1.6V at no expense of additional masks and process steps. This provides an effective degree of freedom in the layout design for the realization of area-saving, high-gain unipolar logic inverters with load-transistors. Record-high voltage gain of 112 is demonstrated from the unipolar logic inverter with depletion-load 0.4 mu m IGZO TFT and 0.7 mu m IGZO drive-transistor, respectively, at operation voltage (V-DD) of 9V.en_US
dc.language.isoen_USen_US
dc.titleHigh-gain, Low-voltage BEOL Logic Gate Inverter Built with Film Profile Engineered IGZO Transistorsen_US
dc.typeProceedings Paperen_US
dc.identifier.journal2016 INTERNATIONAL SYMPOSIUM ON VLSI TECHNOLOGY, SYSTEMS AND APPLICATION (VLSI-TSA)en_US
dc.contributor.department電機學院zh_TW
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.departmentCollege of Electrical and Computer Engineeringen_US
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.identifier.wosnumberWOS:000389022000065en_US
dc.citation.woscount0en_US
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