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dc.contributor.authorKo, CLen_US
dc.contributor.authorKuo, MCen_US
dc.contributor.authorKuo, CNen_US
dc.date.accessioned2014-12-08T15:19:02Z-
dc.date.available2014-12-08T15:19:02Z-
dc.date.issued2005-06-01en_US
dc.identifier.issn0916-8524en_US
dc.identifier.urihttp://dx.doi.org/10.1093/ietele/e88-c.6.1218en_US
dc.identifier.urihttp://hdl.handle.net/11536/13670-
dc.description.abstractA dual-mode, triple-band RF front-end receiver for GSM900, DCS800 and WCDMA is presented in this paper. This chip uses low-IF and zero-IF receiver architectures for GSM and WCDMA respectively to fulfill the entirely different system requirements of the two standards. It consists of three parallel LNAs and down-conversion mixers with on-chip LO I/Q generations. The receiver front-end is implemented in a standard 0.25 mu m CMOS process and consumes about 30-mA from a 2.7-V power supply for all modes. The measured double-side band noise figure and voltage gain are 3 dB, 36 dB for the GSM900, 5.9 dB, 31 d13 for the DCS 1800, and 4.3 dB, 29.6 dB for the WCDMA, respectively.en_US
dc.language.isoen_USen_US
dc.subjectCMOS RF receiveren_US
dc.subjectdual-modeen_US
dc.subjectGSMen_US
dc.subjectW-CDMAen_US
dc.titleA CMOS dual-mode RF front-end receiver for GSM and WCDMA applicationsen_US
dc.typeArticleen_US
dc.identifier.doi10.1093/ietele/e88-c.6.1218en_US
dc.identifier.journalIEICE TRANSACTIONS ON ELECTRONICSen_US
dc.citation.volumeE88Cen_US
dc.citation.issue6en_US
dc.citation.spage1218en_US
dc.citation.epage1224en_US
dc.contributor.department交大名義發表zh_TW
dc.contributor.departmentNational Chiao Tung Universityen_US
dc.identifier.wosnumberWOS:000229824600018-
dc.citation.woscount0-
Appears in Collections:Articles