基於低延遲Quasi-ANSI濾波器組之雙耳助聽器低複雜度降噪演算法的設計與實作

Abstract

我們提出了一個低耗能、即時的降噪(Noise reduction)演法。此演算法接在18頻帶、多率 (Multirate) quasi-ANSI濾波器組織後，並適用於雙耳助聽器。我們提出的降噪演算法使用雙耳線索(Binaural cues)和最小值控制遞歸平均(Minima controlled recursive average)技術產生方向性遮罩(Directional mask)和預估遮罩(Wiener mask)。 方向性遮罩運用雙耳時間差(Interaural time difference)或雙耳能量差(Interaural level difference)以消除側邊雜訊，接著讓預估遮罩消除背景雜訊(Background noise)和相干雜訊(Coherence noise)。演算法分別測試在-3 dB、0 dB、3 dB的雞尾酒派對效應(cocktail-party effect)的環境下，軟體模擬結果發現我們提出的降噪演算法使訊雜比(Signal-to-Noise Ratio, SNR)平均增加4.0 dB。此外，語音清晰度指數(Speech Intelligibility Index, SII) 也有所提升，並且與現有適用於助聽器的降噪演算法比較起來也有更好的性能。 我們提出的降噪演算法實踐在TSMC 90奈米CMOS高臨界電壓製成單元庫(cell library)並使用時脈閥(gated-clock)和多率技術。硬體設計在288 KHz時脈下，消耗約116.3 μW (工作電壓1 伏特)。值得注意的是多率技術大約節省了76%的計算複雜度。此外，提出的降噪演算法硬體能工作在0.6伏特而不違反時間限制(Timing constraint)並即時處理24 KHz的音訊。預估0.6 伏特下的功耗約為63.4 μW

This thesis presents a low-power and real-time noise reduction (NR) algorithm using 18-band 1/3-octave multirate quasi-ANSI filter bank for binaural hearing aids. With aids of binaural cues and minima controlled recursive average (MCRA) approach, the proposed NR algorithm consists of a directional mask and an wiener mask. The directional mask exploits the interaural time difference (ITD) together with the interaural level difference (ILD) of two input sources to attenuate the lateral noise, while the wiener mask is used to further reduce the background noise and the coherence noise. Investigated by the circumstances with the -3 dB, 0 dB, and 3 dB, respectively, cocktail-party effect, the simulation results show that the proposed binaural NR algorithm can gains an average of approximately 4.0 dB SNR improvements. Moreover, the speech intelligibility index (SII) performance is superior, comparing that with the state-of-the-art NR algorithms for hearing aids. The proposed binaural NR algorithm has been implemented in TSMC 90 nm CMOS high-VT technology with gated-clock and multirate schemes. The chip design is operated by 288 KHz and consumes approximately 116.3 μW (@1 V). Note that with multirate signal processing, the proposed NR algorithm is efficient and approximately 76% computation complexity is saved. The chip design can be operated by 0.6 V without violating timing constraint for real-time processing 24 KHz audio. The evaluated power consumption is approximately 63.4 μW (@0.6 V) for binaural hearing aids.