毫米波CMOS寬頻功率放大器及收發機電路設計

Abstract

為了因應下世代寬頻無線通訊與高解析度影像雷達的發展需求，此論文提出使用CMOS製程設計的毫米波寬頻功率放大器，發射機，接收機。由於高網路損耗與低電晶體功率增益，CMOS寬頻功率放大器成為毫米波系統中最大的瓶頸。此論文探討n路同相功率合成器在不同的負載條件之下的頻寬與損耗。而在電容性的負載之下，功率合成器達到功率匹配所需的電器長度將可降低，從而降低了功率損耗。在77-110GHz頻帶內，使用電容性負載來設計四路合一的功率合成器，相較於傳統的威金森合成器將可以減少1dB的功率損耗。為了驗證此概念，此論文設計並實作一個65nm CMOS製程77-110GHz四路合一的功率放大器，以及40nm CMOS製程77-100GHz八路合一的功率放大器。這些放大器經由on-wafer量測，65nm功率放大器在1.2V的電源偏壓之下，帶內增益大於18dB，並在106GHz達到24dB的增益。而在整個頻寬下，其輸出1dB功率壓縮點皆在12dBm附近，飽和功率為14dBm。最佳的功率附加效益大於5%。此放大器經由加大電源偏壓2.5V，輸出功率可達18dBm。而在大於2.6V的偏壓之下，此放大器達到其崩潰電壓。40nm功率放大器在1.8V的偏壓之下，帶內增益大於18dB，在77GHz其飽和功率為15dBm，而最佳功率附加效益為5.7%.

此外為了進一步發展高整合度毫米波電路，此論文亦包含了34-42GHz 90nm-CMOS發射機電路的設計與實作。

React to the demand of developing next-generation wideband communication and high-resolution radar. This thesis proposes millimeter-wave wideband power amplifier (PA), transmitter (TX), receiver (RX) which are all designed in CMOS process. Due to high network loss and low power gain of the transistor at millimeter-wave band. Designing of CMOS wideband power amplifier become a bottleneck in millimeter-wave system. This thesis explores the bandwidth and loss of n-way in-phase power combiner under different loading condition. It shows that under capacitive loading, the combiner’s electrical length can be shrunk with reaching the intended power matching impedance. Consequently, the loss of the combiner can be reduced. In 77-110GHz band, 4-way power combiner adopting capacitive loading can have 1dB loss improvement comparing to Wilkinson power combiner. To demonstrate this concept, a 4-way 77-110GHz power amplifier is designed and fabricated in 65nm CMOS process; a 8-way 77-100GHz power amplifier is designed and fabricated in 40nm CMOS process. The power amplifiers are measured on wafer. In 65nm CMOS power amplifier, with 1.2V supply voltage, the in-band power gain is large than 18dB, and 24dB at 106GHz. The output 1dB compression point (OP1dB) is around 12dBm across 77-110GHz. The maximum power added efficiency (PAE) is large than 5%. The power amplifier reach 18dBm output power under 2.5V supply voltage, while it ends up with breakdown beyond 2.6V supply voltage. While in 40nm CMOS power amplifier, with 1.8V supply voltage, the in-band power gain is large than 18dB. The saturation output power achieves 15dBm at 77GHz. The maximum PAE is 5.7%.

Furthermore, in order to develop highly-integrated millimeter-wave circuit, this thesis also includes a 34-42GHz 90nm-CMOS transceiver circuit design.