標題: | 嵌入式異質核心架構之可調式性能分析工具和評估平台 Configurable Profiling Tool and Evaluation Platform for Low-End Embedded Cores |
作者: | 江怡蕙 陳添福 Chiang, Yi-Huei 資訊科學與工程研究所 |
關鍵字: | 異質多核心;穿戴式裝置;模擬平台;可調式;Heterogeneous;Wearable device;Simulation platform;Configurable |
公開日期: | 2016 |
摘要: | 穿戴式裝置在這幾年已經融入我們的日常生活,然而這些裝置為了方便使用,大多使用電池作為電源供應。但目前電池發展的技術遠不及CPU發展的程度,所以現在處理器的設計更著重在低功耗的架構。異質處理器能同時提供低功耗與運算能力是目前的趨勢。目前有許多針對多核心的模擬,但是沒有異質處理器針對穿戴式裝置的使用情境的模擬平台。
由於上述理由,我們提供了一個針對穿戴式裝置使用情境的模擬平台,不只能同時讓兩個核心執行,並提供了透過由信號機保護的共享空間,讓兩個核心能夠互相溝通與傳遞信號。為了時間效能的正確性,時間的資訊會被加入我們的模擬平台。
這個模擬平台的目前所使用的校正參數是透過ARM DS-5連接Vybrid VF6xx處理器量測得知,這個處理器是由ARM Cortex-A5和ARM Cortex-M4所組成。而對於大多數的程式我們的時間效能正確性達到低於10%。 Wearable devices on contemporary society are gradually subsumed into our lives. However, these devices are using battery for human-friendly using, and technique of the battery has not evolved as fast as CPU. That why processor designers nowadays are focusing power efficient system architecture. Heterogeneous cores are the trend now, which contribute both power efficiency and the ability of computing. Simulations are need for design space exploration. There are many simulator platforms provide multicores simulation, but none of them focuses on heterogeneous cores in wearable scenario. Due to all these reasons above, we provide a simulation platform for wearable scenario. This platform features not only heterogeneous cores, but also inter-core communication by shared memory, which is protected by semaphore, and there is a mechanism provided to signal the other core. Timing information is adopted for performance evaluation accuracy. The calibration parameters and correlation are from done by ARM DS-5 connected to Vybrid VF6xx processor, which is consist of ARM Cortex-A5 and Cortex-M4. And we have performance cycle of most benchmarks lower than 10% discrepancy. |
URI: | http://etd.lib.nctu.edu.tw/cdrfb3/record/nctu/#GT070356069 http://hdl.handle.net/11536/139149 |
顯示於類別: | 畢業論文 |