标题: | 嵌入式异质核心架构之可调式性能分析工具和评估平台 Configurable Profiling Tool and Evaluation Platform for Low-End Embedded Cores |
作者: | 江怡蕙 陈添福 Chiang, Yi-Huei 资讯科学与工程研究所 |
关键字: | 异质多核心;穿戴式装置;模拟平台;可调式;Heterogeneous;Wearable device;Simulation platform;Configurable |
公开日期: | 2016 |
摘要: | 穿戴式装置在这几年已经融入我们的日常生活,然而这些装置为了方便使用,大多使用电池作为电源供应。但目前电池发展的技术远不及CPU发展的程度,所以现在处理器的设计更着重在低功耗的架构。异质处理器能同时提供低功耗与运算能力是目前的趋势。目前有许多针对多核心的模拟,但是没有异质处理器针对穿戴式装置的使用情境的模拟平台。 由于上述理由,我们提供了一个针对穿戴式装置使用情境的模拟平台,不只能同时让两个核心执行,并提供了透过由信号机保护的共享空间,让两个核心能够互相沟通与传递信号。为了时间效能的正确性,时间的资讯会被加入我们的模拟平台。 这个模拟平台的目前所使用的校正参数是透过ARM DS-5连接Vybrid VF6xx处理器量测得知,这个处理器是由ARM Cortex-A5和ARM Cortex-M4所组成。而对于大多数的程式我们的时间效能正确性达到低于10%。 Wearable devices on contemporary society are gradually subsumed into our lives. However, these devices are using battery for human-friendly using, and technique of the battery has not evolved as fast as CPU. That why processor designers nowadays are focusing power efficient system architecture. Heterogeneous cores are the trend now, which contribute both power efficiency and the ability of computing. Simulations are need for design space exploration. There are many simulator platforms provide multicores simulation, but none of them focuses on heterogeneous cores in wearable scenario. Due to all these reasons above, we provide a simulation platform for wearable scenario. This platform features not only heterogeneous cores, but also inter-core communication by shared memory, which is protected by semaphore, and there is a mechanism provided to signal the other core. Timing information is adopted for performance evaluation accuracy. The calibration parameters and correlation are from done by ARM DS-5 connected to Vybrid VF6xx processor, which is consist of ARM Cortex-A5 and Cortex-M4. And we have performance cycle of most benchmarks lower than 10% discrepancy. |
URI: | http://etd.lib.nctu.edu.tw/cdrfb3/record/nctu/#GT070356069 http://hdl.handle.net/11536/139149 |
显示于类别: | Thesis |