以可見光雷射退火技術製作高性能可撓式低溫多晶矽電晶體

Abstract

本論文利用感應耦合型電漿化學氣相沉積氫化非晶矽薄膜和奈秒藍光雷射尖峰退火技術，結合特殊之二氧化矽/金屬/二氧化矽之阻擋層結構，於聚醯亞胺(Polyimide, PI)基板上結晶成晶粒具800nm之多晶矽薄膜，並避免載子累積於非導體之基板上，使用電子束微影定義出元件圖案。使用感應耦合型電漿和原子層沉積系統可以於多晶矽通道上成長出緻密的二氧化矽薄膜或高介電質之氧化鋁材質，綠光雷射退火技術使源/汲極有效活化至片電阻值80 Ω/sq。利用以上技術我們成功直接於聚醯亞胺基板上製造可撓式多晶矽場效電晶體元件，其PMOS次臨界擺幅可低於150 mV/decade以及Ion/Ioff電流比可超過1E7； NMOS元件特性之次臨界擺幅可低於400 mV/decade以及Ion/Ioff電流比可超過1E5。同時滿足可繞式場效電晶體穩定、可撓曲的特性，在高角度與多次的彎曲測試後，依然維持相當的電性穩定度。元件通道經熱載子測試證明通道介面晶界之能態穩定，且透過能態密度(DOS)量測得到低缺陷密度~5E16 /ev.cm-3，CGC擬合得到低通道介面缺陷密度~1E12 /ev.cm-2。在可撓式基板上完成具高效能之低溫多晶矽場效電晶體。

In this thesis, hydrogenated amorphous silicon (a-Si:H) film that was deposited on Polyimide (PI) substrate with oxide/metal/oxide buffer layer structure by inductively-coupled plasma chemical vapor deposition system (ICPCVD). The blue nanosecond spike laser crystallization (BNS-LC) was employed on a-Si:H to recrystallize the poly-Si film with large grain (800 nm). And e-beam lithography is able to define pattern without charge accumulation on the PI substrate. ICPCVD was used to deposited silicon oxide and atom layer deposited system was able to deposited high-K material. Low sheet resistance ~ 80 Ω/sq can achieved by green nanosecond spike laser annealing (GNS-LA). After recrystallization, The PMOS FET exhibits low subthreshold swing of 150 mV/decade with Ion/Ioff ~1E7; The NMOS exhibits subthreshold swing of 400 mV/decade with Ion/Ioff ~1E5 , Also meet the flexible and stable device characteristics after the high angle and multiple bending test. The Density of States (DOS) measurement showed ~5E16 /ev.cm-3 and CGC fitting also showed ~1E12 /ev.cm-2 on channel’s surface.