標題: Asymmetrical Write-Assist for Single-Ended SRAM Operation
作者: Lin, Jihi-Yu
Tu, Ming-Hsien
Tsai, Ming-Chien
Jou, Shyh-Jye
Chuang, Ching-Te
電子工程學系及電子研究所
Department of Electronics Engineering and Institute of Electronics
公開日期: 2009
摘要: In this paper, asymmetrical Write-assist cell virtual ground biasing and positive feedback sensing keeper schemes are proposed to improve the Read Static Noise Margin (RSNM), Write Margin (WM), and operation speed of a single-ended Read/Write 8T SRAM cell. A 4Kbit SRAM implemented in 90nm CMOS technology achieves 1uW/bit average power consumption at 6MHz, V(min) of 410mV at 6MHz, and 234MHz maximum operation frequency at 600mV.
URI: http://hdl.handle.net/11536/13978
ISBN: 978-1-4244-5220-0
期刊: IEEE INTERNATIONAL SOC CONFERENCE, PROCEEDINGS
起始頁: 101
結束頁: 104
Appears in Collections:Conferences Paper