VLSI漏電區域的定位與解析

完整後設資料紀錄

DC 欄位	值	語言
dc.contributor.author	穆劍龍	zh_TW
dc.contributor.author	吳耀銓	zh_TW
dc.contributor.author	Mu, Chien-Lung	en_US
dc.contributor.author	Wu, Yew-Chung	en_US
dc.date.accessioned	2018-01-24T07:39:04Z	-
dc.date.available	2018-01-24T07:39:04Z	-
dc.date.issued	2017	en_US
dc.identifier.uri	http://etd.lib.nctu.edu.tw/cdrfb3/record/nctu/#GT070261302	en_US
dc.identifier.uri	http://hdl.handle.net/11536/140275	-
dc.language.iso	zh_TW	en_US
dc.subject	失效分析	zh_TW
dc.subject	電性分析	zh_TW
dc.subject	漏電	zh_TW
dc.subject	OBIRCH	en_US
dc.subject	InGaAs	en_US
dc.subject	Thermal emmi	en_US
dc.subject	ASIC	en_US
dc.subject	IP	en_US
dc.subject	Fourier Transform	en_US
dc.title	VLSI漏電區域的定位與解析	zh_TW
dc.title	The Location and Root Cause of the VLSI Leakage Path	en_US
dc.type	Thesis	en_US
dc.contributor.department	工學院半導體材料與製程設備學程	zh_TW
顯示於類別：	畢業論文