應用在E頻段之縮小化矽製程180度分合波器

Abstract

在我們這個高速資料傳輸的世界裡，為了符合未來無線通訊系統的需要，提高資料傳輸速度與晶片整合度成了我們的首要優先目標，在這兩種需求情境之下，我們有一個發想是設計操作在E頻段的縮小化被動元件。本篇論文因此呈現從模擬、實作到最重要的比較。 為了縮小元件尺寸，把運用慢波概念的週期片狀地結構(PGSS)置入二氧化矽介電層之中。以過往已做探討的傳輸線模型與理論為根據，我們先分析單一的共平面波導慢波傳輸線其傳播特性，這些慢波傳輸線跟幾種類型的180度分合波器一起經由國家奈米元件實驗室(NDL)所提供的CMOS相容製程實現出來，同時我們對於這個相容製程與製作步驟也詳加介紹與說明。 最後我們呈現量測結果，其結果與模擬有很好的一致性，同時元件也有不錯的性能。然後從比較結果得到的結論是，有PGSS週期結構的180度分合波器其元件可縮小52%，同時也有較短的導波波長。並且片狀地密度較高的PGSS型元件其慢波因子與等效介電常數也比較大。

To meet the requirements of the future wireless communication system in our high speed world, increasing the data transmission rate as well as the chip-level of integration becomes our first priority. Under these two scenarios, we come up with a idea for designing miniaturized passive devices operating in E-Band. This thesis therefore presents simulation, implementation and most importantly, their comparisons. In order to shrink the device, the periodic ground strip structure(PGSS) utilizing slow-wave concept was placed in silicon dioxide layer. Based on the model and theory referred from the studies conducted before, we analyzed the propagation characteristics of the slow-wave CPW transmission lines. With these slow-wave transmissions, several types of 180° hybrid were also achieved through CMOS-compatible process provided by National Nano Device Laboratories; meanwhile, we introduced and described the compatible-process and fabrication procedures in great detail. We finally provided measured results, which show a good agreement with the simulation ones and have good performance. We then came to the conclusions that the 180° hybrid with PGSS achieves 52% size reduction and has shorter guided wavelength. Also, the PGSS type with higher strip density results in greater slow-wave factor as well as effective dielectric constant.