標題: 應用於獵能系統之單電感三輸入三輸出升降壓轉換器
Energy Harvesting Interface Based on a Single-Inductor Triple-Input-Triple-Output (SITITO) Buck-Boost Converter
作者: 劉季瑋
陳柏宏
Liu, Chi-Wei
Chen, Po-Hung
電子研究所
關鍵字: 升降壓轉換器;多輸入多輸出;獵能系統;再生能源;雙再生能源管理;自適應導通時間;buck-boost converter;multi-input multi-output;energy harvesting;renewable sources;dual-source management;adaptive on-time
公開日期: 2017
摘要: 近年來,隨著物聯網的興起,許多新型的穿戴式裝置及微型感測器應用需求也大幅增加,而傳統以電池作為系統能量來源的方式,不僅單價較高,且需對此類裝置頻繁地更換電池更是一大缺點,因此許多搭載再生能源的電源管理系統也逐漸興起。而這些新式的能源管理系統能提供的功率相對較低,因此後端電路也如無線感測器、穿戴式裝置、生醫電子原件等,皆須以低功耗作為重要的設計考量,而電源管理晶片本身除了有轉換效率考量以外,也需適當地分配再生能源的能量,以達到最佳的供電效果。 本論文實現一個應用於物聯網產品之單電感三輸入三輸出升降壓器,輸入能源結合太陽能發電與溫差發電模組,兩者之輸出電壓範圍約為0.05伏至0.8伏,藉由不同種類的發電來源,以減低環境變化對於晶片系統擷取再生能源之影響。為了降低輸入電壓變化對於轉換效率的影響,系統對於不同的輸入電壓適當的調整其峰值電感電流,與傳統的固定峰值電流相比,在輸入電壓較低(<0.15伏)時的轉換效率,提高約10%;在輸出方面,系統產生其中兩個輸出分別給系統本身與後端的類比電路(1.2伏)以及數位電路(0.5伏)做使用,第三個輸出(0.6-1.2伏)可將多餘的輸入能量暫時儲存,而當輸入的再生能源所提供的功率不足時,第三個輸出則可當作輸入能量來源,對兩個需穩定供電的輸出進行充電。而為了保持兩個再生能源都操作在最大功率點,新提出的雙輸入模式,不僅可更有效的追蹤最大功率點,也可提高整體轉換效率,比起傳統的單輸入模式,其最高轉換效率從80.4%提升至84.4%。
This paper presents a single-inductor triple-input-triple-output (SITITO) buck-boost converter in 0.18 µm CMOS process for dual-source energy harvesting application. To regulate the outputs and maintain the harvesting source at the maximum power point (MPP) at the same time. We present the single-source mode (SSM) and dual-source mode (DSM) operation for dual-source energy harvesting system (DSEHS). Moreover, DSM operation have higher energy transfer efficiency. Compare to conventional SSM operation, the DSM enhance 3.9% of maximum energy transfer efficiency in DSEHS. In this paper, we use photovoltaic cell (PV) and thermoelectric generator (TEG) to harvest the energy from environment. The input voltage is targeted from 50-800 mV to cover the voltage which are generated by PV and TEG. To enhance the energy efficiency at low input voltage condition, the adaptive peak-inductor-current (APIC) control adjust the suitable on-time due to the input voltage variation. Compare to the constant peak-inductor-current (CPIC) control, proposed APIC achieves a power efficiency improvement of 11% in ultra-low input voltage condition. The output voltages are 1.2 V and 0.5 V, which used by digital and analog core respectively. The experimental result shows the designed SITITO converter has the peak efficiency 84.4% at 3.8 mW output power.
URI: http://etd.lib.nctu.edu.tw/cdrfb3/record/nctu/#GT070350205
http://hdl.handle.net/11536/140931
顯示於類別:畢業論文