應用於閉迴路神經調節系統具主動學習功能之機器學習處理器設計與實現

Abstract

癲癇為一個長期影響生理的重要神經疾病。大部分的癲癇可以透過藥物來進行控制，然而大約30% 的病人需要透過腦部手術來進行治療並伴隨著損失記憶且影響行動力的風險。一個可行且具前景的解決方案是植入式閉迴路神經調節系統，其將偵測癲癇發作時機並給予電極刺激來抑制腦部異常放電。在這個系統中，高準確度的癲癇偵測器非常的重要。而機器學習之分類器已被用來偵測癲癇發作並具有高準確度。在機器學習之分類器中，在訓練資料不足的情況下，支撐向量機(Support vector machine,SVM)比深度學習更具有實用性。因腦波非常的多變，需要適應學習(Adaptation)來維持分類準確度。然而在植入式的裝置中，離線(off-line)適應有資料安全以及隱私的議題，而線上(on-line)適應又被視為難以在晶片上實現。本論文將呈現第一個以支撐向量機為基礎之機器學習處理器並具有及時線上適應性的低功耗癲癇偵測器。透過高相關低重複的特徵資料選取以及低秩近似來降低特徵資料維度，並採用ADMM演算法來達到平行加速運算。Jacobi-based特徵值分解與反矩陣運算共用CORDIC運算矩陣來大幅度提高硬體面積使用效率。使用客製化的浮點數運算單元來解決高精準度的需求以及面積與功耗的應用效率。運用大規模的時鐘門閘以及將系統操作在最低能量點來進一步減少能量消耗。本論文所提出的以支撐向量機為基礎之機器學習處理器採用40nm CMOS製程實現，核心面積為2.55 mm2並具有3.76M個邏輯閘。此偵測器可以在0.71秒內達到偵測與0.39秒內完成線上適應，並具有94.25%的癲癇偵測準確度與0.26%的假警報率。此系統晶片運作在核心電壓為0.65伏特與130kHz的操作頻率，偵測與適應所消耗的功率分別為0.67mW與0.75mW。

Neurological diseases, such as epilepsy, are long-term disorders and affect body’s activities significantly. Most seizures can be controlled by taking medicine, but approximately 30% of patients need to be considered for surgery at the risk of memory impairment and movement malfunction. A promising solution is a closed-loop implanted neuromodulation system that suppresses the abnormal brain dynamics through electrical stimulation whenever seizures occur. Accurate seizure detection is crucial in such a system and the highest detection accuracy has been achieved by machine learning (ML) based classifiers. Among ML classifiers, support vector machine (SVM) is more powerful than the deep learning ones when sufficient epileptic training data are not available. To maintain the detection accuracy under the high variability of brain dynamics, adaptation of the ML kernel is necessary. However, off-line adaptation has privacy and secure concerns and on-line adaptation is regarded infeasible to be realized on chip for implanted devices. This work presents the first low-power SVM-based ML processor with on-chip adaptation for real-time seizure detection. The signal dimension is significantly reduced through minimum-redundancy maximum-relevance (mRMR) feature selection and low-rank approximation. Alternating direction method of multipliers (ADMM) is adopted to facilitate parallel data processing. Area efficiency is greatly improved by hardware sharing for Jacobi-based eigenvalue decomposition and matrix inversion with shared CORDIC processing elements. Floating-point arithmetic is used for tackling large dynamic range and custom fixed-point to floating-point conversion unit improves power-area efficiency. Extensive clock gating and minimum energy point operation further reduce the energy dissipation. Designed in 40nm CMOS, the proposed SVM-based ML processor integrates 3.76M gates in 2.55 mm2. It achieves a 94.25% seizure detection accuracy and a 0.26% false-alarm rate in 0.71s and adaptation can be realized in 0.39s. The chip dissipates 0.67mW and 0.75mW for detection and adaptation, respectively, at 130kHz from a 0.65 supply voltage.