標題: | Minimizing the number of switchboxes for region definition and ordering assignment |
作者: | Yan, JT Hsiao, PY 交大名義發表 資訊工程學系 National Chiao Tung University Department of Computer Science |
公開日期: | 1-Mar-1996 |
摘要: | For a building block placement, the routing space will be fully defined into channels and switchboxes because the definition of switchboxes releases all the cycles in a channel precedence graph and further yields a safe routing ordering, However, switchbox routing is more difficult than channel routing. Due to the requirements in the routing phase, it is important for us to minimize the number of switchboxes in the definition of channels and switchboxes, In this paper, a region definition and ordering assignment (RDAOA) algorithm on minimizing the number of switchboxes is proposed. First, the routing space is modeled as a floorplan graph. According to the routing precedence in one ''T'' type junction, the graph is further transformed into a channel precedence graph, Hence, the problem of minimizing the number of switchboxes in region definition will correspond to the minimum feedback vertex set (MFVS) problem in the channel precedence graph. Second, based on the cyclic properties in a channel precedence graph, the MFVS problem is solved by the minimal-cycle phase and the long-cycle phase. All the minimal cycles and most of the long cycles are broken in the minimal-cycle phase, and the remaining long cycles are further broken in the long-cycle phase, As a result, fewer switchboxes are defined, and these channels and switchboxes are assigned to guarantee a safe routing ordering, The time complexity of the algorithm is proved to be in O(n) time, where n is the number of line segments in a given floorplan graph, Finally, several examples have been tested on the proposed algorithm and other published algorithms, and the experimental results show that our algorithm defines fewer switchboxes than other algorithms. |
URI: | http://dx.doi.org/10.1109/43.489104 http://hdl.handle.net/11536/1423 |
ISSN: | 0278-0070 |
DOI: | 10.1109/43.489104 |
期刊: | IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS |
Volume: | 15 |
Issue: | 3 |
起始頁: | 336 |
結束頁: | 347 |
Appears in Collections: | Articles |
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