標題: | 應用於萬物聯網之具有增強安全性的降壓型直流對直流轉換器基於真隨機數的偽遲滯控制 An Enhanced Security Buck DC-DC Converter with True Random Number Based Pseudo Hysteresis Controller for Internet-of-Everything Devices |
作者: | 楊文豪 陳科宏 Yang, Wen-Hau Chen, Ke-Horng 電機工程學系 |
關鍵字: | 硬體安全性;電磁干擾;基於真隨機數的偽遲滯控制器;增強安全性的隨機數產生器;hardware security;electromagnetic interference;true random number based pseudo hysteresis controller;enhanced security randomizer |
公開日期: | 2017 |
摘要: | 隨著萬物聯網設備之興起,強大的硬體安全性與低電磁干擾已成為電源管理中重要之設計要求以確保個人數據之防護。傳統基於線性反饋移位暫存器的迴路隨機化技術雖具有防衛功率旁路攻擊之能力,但在功率注入攻擊下,由於線性反饋移位暫存器之可預測性和重複性,導致其所產生之隨機數受到限制,進而造成迴路隨機化技術被破解並失去防衛功率旁路攻擊之能力。此外,功率注入攻擊不僅縮小了基於線性反饋移位暫存器之隨機切換頻率範圍,還會將傳統基於三角波調變技術之調變頻率降低至切換頻率之約1/N倍,故使得電磁干擾雜訊頻譜無法符合EN 55032 Class B之規範。而在其他使用反制方式以提高硬體安全性之技術中,則會大幅地增加功耗或增加硬體成本。
為了同時防衛功率旁路攻擊、功率注入攻擊並降低電磁干擾而不降低性能,本論文提出了增強安全性的隨機數產生器和基於真隨機數的偽遲滯控制器。前者能夠在功率旁路攻擊與功率注入攻擊下仍正常地產生獨立於輸入電壓之隨機數。後者則能將此隨機數轉換成遲滯窗以實現真隨機調變之切換頻率,從而確保適當展頻範圍與低電磁干擾。此外,遲滯控制亦能維持固有的快速暫態響應之特色。實驗結果顯示,即使在高達1伏特的功率注入攻擊干擾下,電磁干擾雜訊之峰值仍可從89.72分貝微伏特降低至54.32分貝微伏特,符合EN 55032 Class B之規範。在0.2安培至0.8安培負載變動與切換頻率中心約為1兆赫之情形下,所提出之架構能實現7.3微秒恢復時間和53毫伏特輸出驟降電壓之暫態響應,並達到92.4%之峰值效率。 As far as Internet-of-Everything (IoE) devices are concerned, strong hardware security and low electromagnetic interference (EMI) are design requirements for power management to guarantee personal data protection. Conventional linear feedback shift register (LFSR) based loop randomization technique has the ability to avoid the power side channel attacks (PSCA), but the power injection attack (PIA) results in limited random number (RN) due to the predictability and reproducibility of the LFSR, and thus cause the loop randomization cracked and vulnerable to the PSCA. Besides, the PIA not only narrows the LFSR based random switching frequency but also reduces the triangular modulation frequency to around 1/N times of the switching frequency. Consequently, the EMI noise floor fails to meet the specification of EN 55032 Class B. Other techniques offer counter-measures to improve resistance against malicious attacks but result in either greatly increased power consumption or large hardware overhead. In this thesis, the true random number (TRN) based pseudo hysteresis controller (PHC) and the enhanced security randomizer (ESR) are proposed to avoid both PSCA and PIA simultaneously and reduce EMI without degrading performance. The ESR is capable of generating input-supply-independent RN correctly under PSCA and PIA. The TRN based PHC converts the RN to the hysteresis window that constitutes a true random modulated switching frequency, thereby ensuring suitable spread spectrum and low EMI. Besides, fast transient response is maintained due to inherent hysteresis control. Experimental results show peak EMI noise is reduced from 89.72dBμV to 54.32dBμV and meets the specification of EN 55032 Class B even under the PIA interference up to 1V. Furthermore, transient performance achieves 7.3μs recovery time and 53mV drop of output voltage in case of 0.2A-to-0.8A load step at the switching frequency around 1MHz and peak efficiency is 92.4%. |
URI: | http://etd.lib.nctu.edu.tw/cdrfb3/record/nctu/#GT070450705 http://hdl.handle.net/11536/142649 |
顯示於類別: | 畢業論文 |