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dc.contributor.author蔡宇宣zh_TW
dc.contributor.author陳明哲zh_TW
dc.contributor.authorTsai, Yu-Shiuanen_US
dc.contributor.authorChen, Ming-Jeren_US
dc.date.accessioned2018-01-24T07:42:34Z-
dc.date.available2018-01-24T07:42:34Z-
dc.date.issued2017en_US
dc.identifier.urihttp://etd.lib.nctu.edu.tw/cdrfb3/record/nctu/#GT070450163en_US
dc.identifier.urihttp://hdl.handle.net/11536/142675-
dc.description.abstract在元件尺寸逐漸的微縮下,短通道效應越來越明顯,因此有了各式各樣的多閘極元件的產生。除了一些大家關注的變異的擾動的影響像是金屬閘極顆粒度、線邊緣粗糙度(LER)以及隨機參雜濃度變動(RDF)外,次臨限擺幅(Subthreshold swing)以及汲極偏壓導致通道中能障降低效應(Drain induced barrier lowering, DIBL)這兩個特性對於元件來說最具代表性。本篇論文主要是模擬不同尺寸的鰭式場效電晶體並利用和自然長度有關的理論公式去歸納出這兩個元件的特性,且可以用來幫助我們快速的預測未知結構的模擬參數範圍,並重現出ID-VG 曲線。zh_TW
dc.description.abstractWhile the devices are pushed to nanoscale, how to overcome the short channel effect is a great challenge, therefore, different multiple-gate geometry architectures of devices have been proposed. Except for the variations of the metal gate granularity, line edge roughness and random dopants fluctuation, the subthreshold swing and drain-induced barrier lowering are prime and direct representative of device. As a result, through the bulk FinFETs simulation with different dimensions and the theoretical formulas with natural length, the two characters can be effectively formulated by the geometry parameters. Then the SS and DIBL can be predicted for the given structure parameters. Besides, this work can help us to determine the range of unknown geometry parameters and reproduce ID-VG curve efficiently.en_US
dc.language.isoen_USen_US
dc.subject模擬zh_TW
dc.subject鰭式場效電晶體zh_TW
dc.subject臨界擺幅zh_TW
dc.subject汲極偏壓致通道能障降低效應zh_TW
dc.subject自然長度zh_TW
dc.subjectSimulationen_US
dc.subjectFinFETen_US
dc.subjectSubthreshold Swingen_US
dc.subjectDrain-Induced Barrier Loweringen_US
dc.subjectNatural lengthen_US
dc.title利用軟體模擬奈米級鰭式場效電晶體的臨界擺幅和汲極偏壓致通道能障降低效應建立自然長度模型及應用zh_TW
dc.titleApplication of Natural Length Model for Subthreshold Swing and Drain-Induced Barrier Lowering in Nanoscale Bulk FinFETs through TCAD Simulationen_US
dc.typeThesisen_US
dc.contributor.department電子研究所zh_TW
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