鍺-二硫化鉬異質結構穿隧式電晶體之探討

Abstract

為了得到更好的效能同時降低製造成本，在元件持續的微縮下，衍生出短通道效應和功耗過高的問題。二維過渡金屬硫屬化物因為有著單層原子層厚度而被視為具有潛力的電晶體通道層，應用在未來的電子元件上。同時，穿隧式電晶體在近十年也開始被廣泛的研究，因為有機會突破傳統次臨界擺幅 60mV/decade 的限制。本篇論文使用鍺-二硫化鉬作為異質接面，由於單層的二硫化鉬僅有原子層的厚度，可以製造出陡峭的 p-n接面。然而半導體材料中的晶格缺陷及介電層與通道層之間的介面缺陷將會影響電流穿隧的機制，如何有效降低缺陷密度成為重要的課題。 我們分析電性量測同時萃取電子傳輸的活化能來探討鍺-二硫化鉬穿隧式電晶體。發現利用不同的操作偏壓可以在同一顆元件觀察到電子能帶間的穿隧或熱游離發射兩種傳輸機制。然而較低的穿隧電流以及較差的次臨界擺幅迫使我們必須想辦法改善二硫化鉬以及介電層的品質。利用介電層事先覆蓋在二硫化鉬上，可以有效地降低二硫化鉬薄膜在元件製造時造成的傷害，使得電流提升。另外，我們嘗試利用液態電解質作為閘極的介電層，由於離子在介面形成電雙層以及存在較少的介面缺陷，元件的次臨界擺幅可以低於一般 ALD 沉積的二氧化鉿。儘管利用二維材料做成的穿隧式電晶體仍屬於早期的研究階段，許多問題目前仍無法得到立即性的改善，但是本研究可以提供有效的分析方法並給予未來研究的方向。

As the channel length of conventional MOSFET becomes smaller in order to improve performance and reduce cost, the short channel-effect and high power consumption become the serious problems to obstruct the device scaling. Two-dimensional TMD materials with atomic thickness are promising semiconductor channel materials for advanced electronic device applications. Besides, band-to-band tunneling transistor has been investigating for ten years because of the potential of overcoming the subthreshold swing limit of 60mV/decade. In this thesis, we fabricate a Ge-MoS2 heterostructure, which possesses an abrupt junction because of the atomic thickness of the monolayer MoS2, and is suitable for fabricating the tunneling transistor. However, the defects, in the junction and the interface between the dielectric and semiconductor, affect the tunneling mechanism and need to be improved. We analyzed the electrical characteristics and extracted the activation energy of the Ge-MoS2 heterojunction TFET. We verified the carrier transport mechanism of the interband tunneling and the thermionic emission at different bias conditions. However, we also observed the poor on-current and subthreshold swing, which depended strongly on the quality of the MoS2 film and gate dielectric. Capping an oxide layer on the MoS2 film before device fabrication prevented the MoS2 degradation and improved the on-current. We also used the ion gating to realize a smaller subthreshold swing compared with the MoS2 transistor using ALD HfO2 as the gate dielectric because of the large capacitance induced by the electrical double layer and low defect densities on the interface between the semiconductor and electrolyte. Though we are still at the early stage of studying the TFET using 2D materials, this research provides a useful methodology and general guideline for studying this type of emerging device in the future.