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dc.contributor.author林家名zh_TW
dc.contributor.author許騰尹zh_TW
dc.contributor.authorLin, Jia Mingen_US
dc.contributor.authorHsu, Terng-Yinen_US
dc.date.accessioned2018-01-24T07:42:46Z-
dc.date.available2018-01-24T07:42:46Z-
dc.date.issued2017en_US
dc.identifier.urihttp://etd.lib.nctu.edu.tw/cdrfb3/record/nctu/#GT070456142en_US
dc.identifier.urihttp://hdl.handle.net/11536/142894-
dc.description.abstract基於現今對於網路傳輸效率的需求,已投入眾多的人力資源於開發5G的系統規格上,而在5G逐見雛型的規格下,Soft-PHY成為未來系統架構的主流。此論文提出一個基於Soft-PHY的Multi Thread TX/RX PHY架構,在有pthread (POSIX threads)與GPU輔佐下使TX/RX PHY功能平行化運作,使得PHY能夠具有更高的吞吐量與更少的處理時間來加速其過程,本篇論文著重於pthread運作與驗證。zh_TW
dc.description.abstractBased on demand for network transmission, there has invested lots of resources to develop the specification of 5G. Due to the limitation of hardware, Soft PHY becomes more and more popular to implement PHY layer. In this paper, we propose a FDD’s multi-threading architecture based on Soft PHY to improve performance for whole eNB PHY layer. Using Pthread to cooperate with GPU and achieve multitasking for supporting multi users. Let PHY layer have more available CPU timing and much higher throughput to speed up. This paper focuses on the operation of Pthread and the verification of speedup for PHY uplink.en_US
dc.language.isozh_TWen_US
dc.subject執行緒zh_TW
dc.subject長期演進技術zh_TW
dc.subjectthreaden_US
dc.subjectLong Term Evolutionen_US
dc.title實作混合式執行緒架構於下行軟體實體層zh_TW
dc.titleHybrid-Threading Architecture for Soft-PHY Downlinken_US
dc.typeThesisen_US
dc.contributor.department資訊科學與工程研究所zh_TW
顯示於類別:畢業論文