完整後設資料紀錄
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.author | Hsieh, E. Ray | en_US |
dc.contributor.author | Kuo, Yen Chen | en_US |
dc.contributor.author | Cheng, Chih-Hung | en_US |
dc.contributor.author | Kuo, Jing Ling | en_US |
dc.contributor.author | Jiang, Meng-Ru | en_US |
dc.contributor.author | Lin, Jian-Li | en_US |
dc.contributor.author | Chen, Hung-Wen | en_US |
dc.contributor.author | Chung, Steve S. | en_US |
dc.contributor.author | Liu, Chuan-Hsi | en_US |
dc.contributor.author | Chen, Tse Pu | en_US |
dc.contributor.author | Huang, Shih An | en_US |
dc.contributor.author | Chen, Tai-Ju | en_US |
dc.contributor.author | Cheng, Osbert | en_US |
dc.date.accessioned | 2018-08-21T05:53:03Z | - |
dc.date.available | 2018-08-21T05:53:03Z | - |
dc.date.issued | 2017-12-01 | en_US |
dc.identifier.issn | 0018-9383 | en_US |
dc.identifier.uri | http://dx.doi.org/10.1109/TED.2017.2763960 | en_US |
dc.identifier.uri | http://hdl.handle.net/11536/144215 | - |
dc.description.abstract | In this paper, we have demonstrated an oxygen-vacancy-based bipolar RRAM on a pure logic 14-nm-node HKMG FinFET platform. A unit cell of the memory consists of a control transistor (FinFET) and a storage transistor (a second FinFET). The later performs as a bipolar RRAM. This unit cell can be integrated in an AND-type memory array. The memory cell has an ON/OFF ratio equal to 200 and 400 for the n-type and p-type FinFET RRAMs, respectively, endurance larger than 400 and 1000 times for n- and p-type devices, respectively, and the retention test for over 1 month under 125 degrees C temperature environment. To analyze the array performance of the AND-type FinFET RRAM at the circuit level, we have further discussed the issues of the sneak path and disturbance, in which an active-fin isolation of FinFET in an AND-type array has been suggested to minimize the leakage current induced by sneak paths. The results have shown a large window with up to 103 ON/OFF ratio, 30% standby power reduction, and 90% active power reduction with reference to the conventional AND-type array. As a result, the bipolar FinFET RRAM exhibits great potential for the embedded memory applications, in particular it can be extended to 28-nm HKMG and the FinFET platform beyond 14-nm technology node, to fill the Moore's gap between the high-performance logic and the embedded memory. | en_US |
dc.language.iso | en_US | en_US |
dc.subject | Embedded memory | en_US |
dc.subject | FinFET | en_US |
dc.subject | high-k metal gate | en_US |
dc.subject | RRAM | en_US |
dc.subject | sneak path | en_US |
dc.subject | Moore's gap | en_US |
dc.title | A 14-nm FinFET Logic CMOS Process Compatible RRAM Flash With Excellent Immunity to Sneak Path | en_US |
dc.type | Article | en_US |
dc.identifier.doi | 10.1109/TED.2017.2763960 | en_US |
dc.identifier.journal | IEEE TRANSACTIONS ON ELECTRON DEVICES | en_US |
dc.citation.volume | 64 | en_US |
dc.citation.spage | 4910 | en_US |
dc.citation.epage | 4918 | en_US |
dc.contributor.department | 電子工程學系及電子研究所 | zh_TW |
dc.contributor.department | Department of Electronics Engineering and Institute of Electronics | en_US |
dc.identifier.wosnumber | WOS:000417727500015 | en_US |
顯示於類別: | 期刊論文 |