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dc.contributor.authorJi, Chengen_US
dc.contributor.authorChang, Li-Pinen_US
dc.contributor.authorWu, Chaoen_US
dc.contributor.authorShi, Liangen_US
dc.contributor.authorXue, Chun Jasonen_US
dc.date.accessioned2018-08-21T05:53:26Z-
dc.date.available2018-08-21T05:53:26Z-
dc.date.issued2018-04-01en_US
dc.identifier.issn0278-0070en_US
dc.identifier.urihttp://dx.doi.org/10.1109/TCAD.2017.2729405en_US
dc.identifier.urihttp://hdl.handle.net/11536/144701-
dc.description.abstractNAND flash memory has been the default storage component in embedded systems. One of the key technologies for flash management is the address mapping scheme between logical addresses and physical addresses, which deals with the inability of in-place-updating in flash memory. Demand-based page-level mapping cache is often applied to match the cache size constraint and performance requirement of embedded storage systems. However, recent studies showed that the management overhead of mapping cache schemes is sensitive to the host I/O patterns, especially when the mapping cache is small. This paper presents a novel I/O scheduling scheme, called MAP+, to alleviate this problem. The proposed scheduling approach reorders I/O requests for performance improvement from two angles. Prioritizing the requests that will hit in the mapping cache, and grouping requests with related logical addresses into large batches. Batches of requests are reordered to further optimize request waiting time. Experimental results show that MAP+ improved upon traditional I/O schedulers by 48% and 18% in terms of read and write latencies, respectively.en_US
dc.language.isoen_USen_US
dc.subjectEmbedded systemen_US
dc.subjectflash memory performanceen_US
dc.subjectI/O schedulingen_US
dc.subjectmapping cacheen_US
dc.titleAn I/O Scheduling Strategy for Embedded Flash Storage Devices With Mapping Cacheen_US
dc.typeArticleen_US
dc.identifier.doi10.1109/TCAD.2017.2729405en_US
dc.identifier.journalIEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMSen_US
dc.citation.volume37en_US
dc.citation.spage756en_US
dc.citation.epage769en_US
dc.contributor.department資訊工程學系zh_TW
dc.contributor.departmentDepartment of Computer Scienceen_US
dc.identifier.wosnumberWOS:000427850100004en_US
Appears in Collections:Articles