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dc.contributor.authorHo, Shin-Yien_US
dc.contributor.authorLee, Chun-Hsunen_US
dc.contributor.authorTzou, An-Jyeen_US
dc.contributor.authorKuo, Hao-Chungen_US
dc.contributor.authorWu, Yuh-Rennen_US
dc.contributor.authorHuang, JianJangen_US
dc.date.accessioned2018-08-21T05:53:55Z-
dc.date.available2018-08-21T05:53:55Z-
dc.date.issued2017-04-01en_US
dc.identifier.issn0018-9383en_US
dc.identifier.urihttp://dx.doi.org/10.1109/TED.2017.2657683en_US
dc.identifier.urihttp://hdl.handle.net/11536/145330-
dc.description.abstractCurrent collapse is a phenomenon that increases the channel resistance during the switching process when the high gate and drain voltages are applied. The effect can be found from GaN-based high electron mobility transistors (HEMTs) and is an obstacle for their applications to power electronics. There have been numerous reports on suppressing current collapse using semiconductor process technologies. In this paper, an enhancement mode (E-mode) AIGaN/GaN/AIGaN double heterostructure was proposed. The current collapse phenomena were studied on devices of E-mode MIS and Schottky gate HEMTs. The results indicate the suppression of current collapse for devices with double heterostructure.en_US
dc.language.isoen_USen_US
dc.subjectCurrent collapseen_US
dc.subjectenhancement mode (E-mode)en_US
dc.subjectGaNen_US
dc.subjecthigh-electron mobility transistor (HEMT)en_US
dc.titleSuppression of Current Collapse in Enhancement Mode GaN-Based HEMTs Using an AIGaN/GaN/AIGaN Double Heterostructureen_US
dc.typeArticleen_US
dc.identifier.doi10.1109/TED.2017.2657683en_US
dc.identifier.journalIEEE TRANSACTIONS ON ELECTRON DEVICESen_US
dc.citation.volume64en_US
dc.citation.spage1505en_US
dc.citation.epage1510en_US
dc.contributor.department光電工程學系zh_TW
dc.contributor.departmentDepartment of Photonicsen_US
dc.identifier.wosnumberWOS:000398818400014en_US
Appears in Collections:Articles